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Searched refs:control_ddrio_0 (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/arch/arm/mach-omap2/omap5/
Dhwinit.c65 writel(ioregs->ctrl_ddrio_0, (*ctrl)->control_ddrio_0); in io_settings_lpddr2()
85 writel(ioregs->ctrl_ddrio_0, (*ctrl)->control_ddrio_0); in io_settings_ddr3()
Dprcm-regs.c334 .control_ddrio_0 = 0x4A002E50,
426 .control_ddrio_0 = 0x4A002E50,
/external/u-boot/arch/arm/include/asm/
Domap_common.h423 u32 control_ddrio_0; member