Home
last modified time | relevance | path

Searched refs:cpll_pdiv (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-exynos/
Dclock_init_exynos5.c149 .cpll_pdiv = 0x4,
272 .cpll_pdiv = 0x4,
375 .cpll_pdiv = 0x4,
587 writel(mem->cpll_pdiv * PLL_LOCK_FACTOR, &clk->cpll_lock); in exynos5250_system_clock_init()
641 val = set_pll(mem->cpll_mdiv, mem->cpll_pdiv, mem->cpll_sdiv); in exynos5250_system_clock_init()
797 writel(mem->cpll_pdiv * PLL_LOCK_FACTOR, &clk->cpll_lock); in exynos5420_system_clock_init()
870 val = set_pll(mem->cpll_mdiv, mem->cpll_pdiv, mem->cpll_sdiv); in exynos5420_system_clock_init()
Dclock_init.h51 unsigned cpll_pdiv; member