| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/crc/ |
| D | invalid.s | 54 crc32cw $1, $2, $2 # CHECK: :[[@LINE]]:3: error: source and destination must match
55 crc32cw $1, $2, $3 # CHECK: :[[@LINE]]:3: error: source and destination must match
56 crc32cw $1, $2, 2 # CHECK: :[[@LINE]]:20: error: invalid operand for instruction
57 crc32cw $1, 2, $2 # CHECK: :[[@LINE]]:16: error: invalid operand for instruction
58 crc32cw 1, $2, $2 # CHECK: :[[@LINE]]:12: error: invalid operand for instruction
59 crc32cw $1, $2 # CHECK: :[[@LINE]]:3: error: too few operands for instruction
60 crc32cw $1 # CHECK: :[[@LINE]]:3: error: too few operands for instruction
61 crc32cw $1, $2, 0($2) # CHECK: :[[@LINE]]:20: error: invalid operand for instruction
|
| D | valid.s | 12 crc32cw $7, $8, $7 # CHECK: crc32cw $7, $8, $7 # encoding: [0x7d,0x07,0x01,0x8f]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | crc32.ll | 44 ; CHECK: crc32cw r0, r0, r1
45 %val = call i32 @llvm.arm.crc32cw(i32 %cur, i32 %next)
57 declare i32 @llvm.arm.crc32cw(i32, i32)
|
| /external/llvm/test/CodeGen/ARM/ |
| D | crc32.ll | 44 ; CHECK: crc32cw r0, r0, r1
45 %val = call i32 @llvm.arm.crc32cw(i32 %cur, i32 %next)
57 declare i32 @llvm.arm.crc32cw(i32, i32)
|
| /external/llvm/test/MC/AArch64/ |
| D | cyclone-crc.s | 18 crc32cw w11, w13, w17
25 CHECK: crc32cw w11, w13, w17
|
| D | arm64-basic-a64-instructions.s | 9 crc32cw wzr, w3, w5
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-crc32.ll | 51 ; CHECK: crc32cw w0, w0, w1
52 %val = call i32 @llvm.aarch64.crc32cw(i32 %cur, i32 %next)
70 declare i32 @llvm.aarch64.crc32cw(i32, i32)
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | arm64-crc32.ll | 52 ; CHECK: crc32cw w0, w0, w1
53 %val = call i32 @llvm.aarch64.crc32cw(i32 %cur, i32 %next)
71 declare i32 @llvm.aarch64.crc32cw(i32, i32)
|
| /external/llvm/test/MC/ARM/ |
| D | crc32.s | 20 crc32cw r0, r1, r2
24 @ CHECK: crc32cw r0, r1, r2 @ encoding: [0x42,0x02,0x41,0xe1]
|
| D | crc32-thumb.s | 20 crc32cw r0, r1, r2
24 @ CHECK: crc32cw r0, r1, r2 @ encoding: [0xd1,0xfa,0xa2,0xf0]
|
| D | directive-arch_extension-crc.s | 28 crc32cw r0, r1, r2
54 crc32cw r0, r1, r2
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | crc32.s | 20 crc32cw r0, r1, r2
24 @ CHECK: crc32cw r0, r1, r2 @ encoding: [0x42,0x02,0x41,0xe1]
|
| D | crc32-thumb.s | 20 crc32cw r0, r1, r2
24 @ CHECK: crc32cw r0, r1, r2 @ encoding: [0xd1,0xfa,0xa2,0xf0]
|
| D | directive-arch_extension-crc.s | 28 crc32cw r0, r1, r2
54 crc32cw r0, r1, r2
|
| /external/capstone/suite/MC/ARM/ |
| D | crc32-thumb.s.cs | 7 0xd1,0xfa,0xa2,0xf0 = crc32cw r0, r1, r2
|
| D | crc32.s.cs | 7 0x42,0x02,0x41,0xe1 = crc32cw r0, r1, r2
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| D | arm64-basic-a64-instructions.s | 9 crc32cw wzr, w3, w5
|
| D | crc.s | 35 crc32cw w11, w13, w17
|
| /external/clang/test/CodeGen/ |
| D | arm64-crc32.c | 39 int crc32cw(int a, int b) in crc32cw() function
|
| D | arm-crc32.c | 38 int crc32cw(int a, int b) in crc32cw() function
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/crc/ |
| D | valid-32r6.txt | 9 0x7d 0x07 0x01 0x8f # CHECK: crc32cw $7, $8, $7
|
| D | valid-32r6-el.txt | 9 0x8f 0x01 0x07 0x7d # CHECK: crc32cw $7, $8, $7
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | crc32.txt | 8 # CHECK: crc32cw r0, r1, r2
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | crc32-thumb.txt | 8 # CHECK: crc32cw r0, r1, r2
|
| D | crc32.txt | 8 # CHECK: crc32cw r0, r1, r2
|