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Searched refs:createAndComputeVirtRegInterval (Results 1 – 14 of 14) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSILowerControlFlow.cpp252 LIS->createAndComputeVirtRegInterval(SaveExecReg); in emitIf()
253 LIS->createAndComputeVirtRegInterval(Tmp); in emitIf()
255 LIS->createAndComputeVirtRegInterval(CopyReg); in emitIf()
323 LIS->createAndComputeVirtRegInterval(DstReg); in emitElse()
324 LIS->createAndComputeVirtRegInterval(CopyReg); in emitElse()
326 LIS->createAndComputeVirtRegInterval(SaveReg); in emitElse()
DSIOptimizeExecMaskingPreRA.cpp211 LIS->createAndComputeVirtRegInterval(SaveExecReg); in runOnMachineFunction()
245 LIS->createAndComputeVirtRegInterval(Reg); in runOnMachineFunction()
DSIFormMemoryClauses.cpp384 LIS->createAndComputeVirtRegInterval(Reg); in runOnMachineFunction()
392 LIS->createAndComputeVirtRegInterval(Reg); in runOnMachineFunction()
DSIFixWWMLiveness.cpp174 LIS->createAndComputeVirtRegInterval(Reg); in runOnWWMInstruction()
DSIWholeQuadMode.cpp560 LIS->createAndComputeVirtRegInterval(SaveReg); in saveSCC()
800 LIS->createAndComputeVirtRegInterval(SavedWQMReg); in processBlock()
/external/llvm/include/llvm/CodeGen/
DLiveIntervalAnalysis.h113 return createAndComputeVirtRegInterval(Reg); in getInterval()
132 LiveInterval &createAndComputeVirtRegInterval(unsigned Reg) { in createAndComputeVirtRegInterval() function
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DLiveIntervals.h119 return createAndComputeVirtRegInterval(Reg); in getInterval()
138 LiveInterval &createAndComputeVirtRegInterval(unsigned Reg) { in createAndComputeVirtRegInterval() function
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyRegStackify.cpp457 LIS.createAndComputeVirtRegInterval(NewReg); in MoveForSingleUse()
489 LIS.createAndComputeVirtRegInterval(NewReg); in RematerializeCheapDef()
569 LIS.createAndComputeVirtRegInterval(TeeReg); in MoveAndTeeForMultiUse()
570 LIS.createAndComputeVirtRegInterval(DefReg); in MoveAndTeeForMultiUse()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/
DWebAssemblyRegStackify.cpp492 LIS.createAndComputeVirtRegInterval(NewReg); in MoveForSingleUse()
524 LIS.createAndComputeVirtRegInterval(NewReg); in RematerializeCheapDef()
604 LIS.createAndComputeVirtRegInterval(TeeReg); in MoveAndTeeForMultiUse()
605 LIS.createAndComputeVirtRegInterval(DefReg); in MoveAndTeeForMultiUse()
/external/llvm/lib/Target/AMDGPU/
DSILoadStoreOptimizer.cpp276 LIS->createAndComputeVirtRegInterval(DestReg); in mergeRead2Pair()
/external/llvm/lib/CodeGen/
DLiveIntervalAnalysis.cpp202 createAndComputeVirtRegInterval(Reg); in computeVirtRegs()
1510 createAndComputeVirtRegInterval(MOI->getReg()); in repairIntervalsInRange()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DLiveIntervals.cpp208 createAndComputeVirtRegInterval(Reg); in computeVirtRegs()
1591 createAndComputeVirtRegInterval(MOI->getReg()); in repairIntervalsInRange()
/external/llvm/lib/Target/Hexagon/
DHexagonExpandCondsets.cpp547 LIS->createAndComputeVirtRegInterval(Reg); in recalculateLiveInterval()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonExpandCondsets.cpp543 LIS->createAndComputeVirtRegInterval(Reg); in recalculateLiveInterval()