Searched refs:createRegister (Results 1 – 11 of 11) sorted by relevance
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | SIMachineFunctionInfo.cpp | 77 ArgDescriptor::createRegister(ScratchRSrcReg); in SIMachineFunctionInfo() 79 ArgDescriptor::createRegister(ScratchWaveOffsetReg); in SIMachineFunctionInfo() 136 = ArgDescriptor::createRegister(AMDGPU::SGPR5); in SIMachineFunctionInfo() 189 ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addPrivateSegmentBuffer() 196 ArgInfo.DispatchPtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addDispatchPtr() 203 ArgInfo.QueuePtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addQueuePtr() 211 = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addKernargSegmentPtr() 218 ArgInfo.DispatchID = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addDispatchID() 225 ArgInfo.FlatScratchInit = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addFlatScratchInit() 232 ArgInfo.ImplicitBufferPtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addImplicitBufferPtr()
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D | SIMachineFunctionInfo.h | 265 ArgInfo.WorkGroupIDX = ArgDescriptor::createRegister(getNextSystemSGPR()); in addWorkGroupIDX() 271 ArgInfo.WorkGroupIDY = ArgDescriptor::createRegister(getNextSystemSGPR()); in addWorkGroupIDY() 277 ArgInfo.WorkGroupIDZ = ArgDescriptor::createRegister(getNextSystemSGPR()); in addWorkGroupIDZ() 283 ArgInfo.WorkGroupInfo = ArgDescriptor::createRegister(getNextSystemSGPR()); in addWorkGroupInfo() 303 = ArgDescriptor::createRegister(getNextSystemSGPR()); in addPrivateSegmentWaveByteOffset() 309 ArgInfo.PrivateSegmentWaveByteOffset = ArgDescriptor::createRegister(Reg); in setPrivateSegmentWaveByteOffset()
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D | AMDGPUArgumentUsageInfo.h | 42 static ArgDescriptor createRegister(unsigned Reg) { in createRegister() function
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D | SIISelLowering.cpp | 1401 Info.setWorkItemIDX(ArgDescriptor::createRegister(Reg)); in allocateSpecialEntryInputVGPRs() 1409 Info.setWorkItemIDY(ArgDescriptor::createRegister(Reg)); in allocateSpecialEntryInputVGPRs() 1417 Info.setWorkItemIDZ(ArgDescriptor::createRegister(Reg)); in allocateSpecialEntryInputVGPRs() 1440 return ArgDescriptor::createRegister(Reg); in allocateVGPR32Input() 1457 return ArgDescriptor::createRegister(Reg); in allocateSGPR32InputImpl()
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/external/llvm/lib/Target/Sparc/ |
D | SparcFrameLowering.cpp | 175 MCCFIInstruction::createRegister(nullptr, regOutRA, regInRA)); in emitPrologue()
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/external/llvm/include/llvm/MC/ |
D | MCDwarf.h | 411 static MCCFIInstruction createRegister(MCSymbol *L, unsigned Register1, in createRegister() function
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/ |
D | SparcFrameLowering.cpp | 175 MCCFIInstruction::createRegister(nullptr, regOutRA, regInRA)); in emitPrologue()
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/MC/ |
D | MCDwarf.h | 502 static MCCFIInstruction createRegister(MCSymbol *L, unsigned Register1, in createRegister() function
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/external/llvm/lib/MC/ |
D | MCStreamer.cpp | 430 MCCFIInstruction::createRegister(Label, Register1, Register2); in EmitCFIRegister()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/MC/ |
D | MCStreamer.cpp | 545 MCCFIInstruction::createRegister(Label, Register1, Register2); in EmitCFIRegister()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/MIRParser/ |
D | MIParser.cpp | 1776 MF.addFrameInst(MCCFIInstruction::createRegister(nullptr, Reg, Reg2)); in parseCFIOperand()
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