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Searched refs:cs_mem_size (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/drivers/ddr/marvell/a38x/
Dmv_ddr_plat.c1000 u32 cs_mem_size; in ddr3_calc_mem_cs_size() local
1003 cs_mem_size = ((ddr3_get_bus_width() / ddr3_get_device_width(cs)) * in ddr3_calc_mem_cs_size()
1012 cs_mem_size *= DDR_CONTROLLER_BUS_WIDTH_MULTIPLIER; in ddr3_calc_mem_cs_size()
1014 if ((cs_mem_size < 128) || (cs_mem_size > 4096)) { in ddr3_calc_mem_cs_size()
1019 *cs_size = cs_mem_size << 20; /* write cs size in bytes */ in ddr3_calc_mem_cs_size()
1028 uint64_t cs_mem_size = 0; in ddr3_fast_path_dynamic_cs_size_config() local
1041 if (ddr3_calc_mem_cs_size(cs, &cs_mem_size) != MV_OK) in ddr3_fast_path_dynamic_cs_size_config()
1062 cs_mem_size = max_mem_size * in ddr3_fast_path_dynamic_cs_size_config()
1074 reg |= (cs_mem_size - 1) & 0xffff0000; in ddr3_fast_path_dynamic_cs_size_config()
1079 reg = ((cs_mem_size) * cs) & 0xffff0000; in ddr3_fast_path_dynamic_cs_size_config()
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Dxor.c343 uint64_t total_mem_size, cs_mem_size = 0; in ddr3_new_tip_ecc_scrub() local
351 ddr3_calc_mem_cs_size(0, &cs_mem_size); in ddr3_new_tip_ecc_scrub()
353 mv_sys_xor_init(max_cs, cs_ena, cs_mem_size, 0); in ddr3_new_tip_ecc_scrub()
354 total_mem_size = max_cs * cs_mem_size; in ddr3_new_tip_ecc_scrub()
Dddr3_training.c2821 u32 cs_mem_size, dev_size; in hws_ddr3_calc_mem_cs_size() local
2825 cs_mem_size = ((hws_ddr3_get_bus_width() / in hws_ddr3_calc_mem_cs_size()
2830 if (cs_mem_size == 2) { in hws_ddr3_calc_mem_cs_size()
2832 } else if (cs_mem_size == 4) { in hws_ddr3_calc_mem_cs_size()
2834 } else if (cs_mem_size == 8) { in hws_ddr3_calc_mem_cs_size()
2836 } else if (cs_mem_size == 16) { in hws_ddr3_calc_mem_cs_size()
2838 } else if (cs_mem_size == 32) { in hws_ddr3_calc_mem_cs_size()
2853 u32 cs_mem_size = 0; in hws_ddr3_cs_base_adr_calc() local
2859 if (hws_ddr3_calc_mem_cs_size(if_id, cs, &cs_mem_size) != MV_OK) in hws_ddr3_cs_base_adr_calc()
2880 cs_mem_size = max_mem_size * in hws_ddr3_cs_base_adr_calc()
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