| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | cond-sel-value-prop.ll | 54 ; CHECK: csinc x0, x[[REG]], xzr, ne
76 ; CHECK: csinc x0, x[[REG]], xzr, eq
85 ; CHECK: csinc x0, x[[REG]], xzr, eq
|
| D | cond-sel.ll | 67 ; CHECK: csinc {{w[0-9]+}}, [[LHS]], [[RHS]], ls
75 ; CHECK: csinc {{w[0-9]+}}, [[LHS]], {{w[0-9]+}}, le
84 ; CHECK: csinc {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, ls
92 ; CHECK: csinc {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, le
209 ; N.b. code is not optimal here (32-bit csinc would be better) but
|
| D | arm64-csel.ll | 237 ; CHECK: csinc w0, w[[REG]], wzr, eq
247 ; CHECK: csinc x0, x[[REG]], xzr, eq
257 ; CHECK: csinc w0, w[[REG]], wzr, ne
267 ; CHECK: csinc x0, x[[REG]], xzr, ne
|
| D | arm64-fast-isel-fcmp.ll | 87 ; CHECK-NEXT: csinc {{w[0-9]+}}, [[REG]], wzr, le
112 ; CHECK-NEXT: csinc {{w[0-9]+}}, [[REG]], wzr, vc
|
| D | arm64-early-ifcvt.ll | 42 ; CHECK-NEXT: csinc w0, w1, w0, eq
60 ; CHECK-NEXT: csinc x0, x1, x0, eq
78 ; CHECK-NEXT: csinc w0, w1, w0, ne
96 ; CHECK-NEXT: csinc x0, x1, x0, ne
|
| D | ifcvt-select.ll | 7 ;CHECK: csinc
|
| D | f16-instructions.ll | 239 ; CHECK-CVT-NEXT: csinc w0, [[TRUE]], wzr, vc
245 ; CHECK-FP16-NEXT: csinc w0, [[TRUE]], wzr, vc
343 ; CHECK-CVT-NEXT: csinc w0, [[TRUE]], wzr, le
349 ; CHECK-FP16-NEXT: csinc w0, [[TRUE]], wzr, le
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | cond-sel.ll | 67 ; CHECK: csinc {{w[0-9]+}}, [[LHS]], [[RHS]], ls
75 ; CHECK: csinc {{w[0-9]+}}, [[LHS]], {{w[0-9]+}}, le
84 ; CHECK: csinc {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, ls
92 ; CHECK: csinc {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, le
209 ; N.b. code is not optimal here (32-bit csinc would be better) but
|
| D | arm64-fast-isel-fcmp.ll | 87 ; CHECK-NEXT: csinc {{w[0-9]+}}, [[REG]], wzr, le
112 ; CHECK-NEXT: csinc {{w[0-9]+}}, [[REG]], wzr, vc
|
| D | arm64-early-ifcvt.ll | 42 ; CHECK-NEXT: csinc w0, w1, w0, eq
60 ; CHECK-NEXT: csinc x0, x1, x0, eq
78 ; CHECK-NEXT: csinc w0, w1, w0, ne
96 ; CHECK-NEXT: csinc x0, x1, x0, ne
|
| D | ifcvt-select.ll | 7 ;CHECK: csinc
|
| /external/u-boot/arch/arm/lib/ |
| D | setjmp_aarch64.S | 38 csinc x0, x0, xzr, ne
|
| /external/capstone/suite/MC/AArch64/ |
| D | basic-a64-instructions.s.cs | 508 0x01,0x14,0x93,0x1a = csinc w1, w0, w19, ne
509 0xbf,0x04,0x89,0x1a = csinc wzr, w5, w9, eq
510 0xe9,0xc7,0x9e,0x1a = csinc w9, wzr, w30, gt
511 0x81,0x47,0x9f,0x1a = csinc w1, w28, wzr, mi
512 0xf3,0xb6,0x9d,0x9a = csinc x19, x23, x29, lt
513 0x7f,0xa4,0x84,0x9a = csinc xzr, x3, x4, ge
514 0xe5,0x27,0x86,0x9a = csinc x5, xzr, x6, hs
515 0x07,0x35,0x9f,0x9a = csinc x7, x8, xzr, lo
532 0xe3,0x17,0x9f,0x1a = csinc w3, wzr, wzr, ne
533 0xe9,0x47,0x9f,0x9a = csinc x9, xzr, xzr, mi
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| D | basic-a64-instructions.s | 1347 csinc w1, w0, w19, ne
1348 csinc wzr, w5, w9, eq
1349 csinc w9, wzr, w30, gt
1350 csinc w1, w28, wzr, mi
1356 csinc x19, x23, x29, lt
1357 csinc xzr, x3, x4, ge
1358 csinc x5, xzr, x6, cs
1359 csinc x7, x8, xzr, cc
|
| D | arm64-arithmetic-encoding.s | 552 csinc w1, w2, w3, eq
553 csinc x1, x2, x3, eq
|
| D | basic-a64-diagnostics.s | 1362 csinc w20, w21, wsp, mi
1363 csinc sp, x30, x29, eq
|
| /external/llvm/test/MC/AArch64/ |
| D | basic-a64-instructions.s | 1347 csinc w1, w0, w19, ne
1348 csinc wzr, w5, w9, eq
1349 csinc w9, wzr, w30, gt
1350 csinc w1, w28, wzr, mi
1356 csinc x19, x23, x29, lt
1357 csinc xzr, x3, x4, ge
1358 csinc x5, xzr, x6, cs
1359 csinc x7, x8, xzr, cc
|
| D | arm64-arithmetic-encoding.s | 552 csinc w1, w2, w3, eq
553 csinc x1, x2, x3, eq
|
| D | basic-a64-diagnostics.s | 1357 csinc w20, w21, wsp, mi
1358 csinc sp, x30, x29, eq
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-arithmetic.txt | 516 # CHECK: csinc w1, w2, w3, eq
518 # CHECK: csinc x1, x2, x3, eq
|
| D | basic-a64-instructions.txt | 895 # CHECK: csinc w1, w0, w19, ne
896 # CHECK: csinc wzr, w5, w9, eq
897 # CHECK: csinc w9, wzr, w30, gt
898 # CHECK: csinc w1, w28, wzr, mi
899 # CHECK: csinc x19, x23, x29, lt
900 # CHECK: csinc xzr, x3, x4, ge
901 # CHECK: csinc x5, xzr, x6, hs
902 # CHECK: csinc x7, x8, xzr, lo
951 # CHECK: csinc w2, wzr, wzr, al
967 # CHECK: csinc w5, w6, w6, nv
[all …]
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-arithmetic.txt | 516 # CHECK: csinc w1, w2, w3, eq
518 # CHECK: csinc x1, x2, x3, eq
|
| D | basic-a64-instructions.txt | 894 # CHECK: csinc w1, w0, w19, ne
895 # CHECK: csinc wzr, w5, w9, eq
896 # CHECK: csinc w9, wzr, w30, gt
897 # CHECK: csinc w1, w28, wzr, mi
898 # CHECK: csinc x19, x23, x29, lt
899 # CHECK: csinc xzr, x3, x4, ge
900 # CHECK: csinc x5, xzr, x6, hs
901 # CHECK: csinc x7, x8, xzr, lo
950 # CHECK: csinc w2, wzr, wzr, al
966 # CHECK: csinc w5, w6, w6, nv
[all …]
|
| /external/v8/src/arm64/ |
| D | macro-assembler-arm64-inl.h | 432 csinc(rd, rn, rm, cond); in Csinc()
|
| D | assembler-arm64.cc | 1354 void Assembler::csinc(const Register& rd, in csinc() function in v8::internal::Assembler
1381 csinc(rd, zr, zr, NegateCondition(cond)); in cset()
1394 csinc(rd, rn, rn, NegateCondition(cond)); in cinc()
|