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Searched refs:ctlr (Results 1 – 7 of 7) sorted by relevance

/external/u-boot/drivers/spi/
Dich.c85 static void ich_set_bbar(struct ich_spi_priv *ctlr, uint32_t minaddr) in ich_set_bbar() argument
91 ichspi_bbar = ich_readl(ctlr, ctlr->bbar) & ~bbar_mask; in ich_set_bbar()
93 ich_writel(ctlr, ichspi_bbar, ctlr->bbar); in ich_set_bbar()
115 struct ich_spi_priv *ctlr) in ich_init_controller() argument
128 ctlr->opmenu = offsetof(struct ich7_spi_regs, opmenu); in ich_init_controller()
129 ctlr->menubytes = sizeof(ich7_spi->opmenu); in ich_init_controller()
130 ctlr->optype = offsetof(struct ich7_spi_regs, optype); in ich_init_controller()
131 ctlr->addr = offsetof(struct ich7_spi_regs, spia); in ich_init_controller()
132 ctlr->data = offsetof(struct ich7_spi_regs, spid); in ich_init_controller()
133 ctlr->databytes = sizeof(ich7_spi->spid); in ich_init_controller()
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/external/u-boot/drivers/gpio/
Dtegra_gpio.c45 struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; in get_config() local
46 struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; in get_config()
62 struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; in set_config() local
63 struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; in set_config()
80 struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; in get_direction() local
81 struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; in get_direction()
97 struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; in set_direction() local
98 struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; in set_direction()
115 struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; in set_level() local
116 struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; in set_level()
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Dsunxi_gpio.c289 struct sunxi_gpio_reg *ctlr; in gpio_sunxi_bind() local
296 ctlr = (struct sunxi_gpio_reg *)devfdt_get_addr(parent); in gpio_sunxi_bind()
304 plat->regs = &ctlr->gpio_bank[bank]; in gpio_sunxi_bind()
/external/u-boot/drivers/pci/
Dpci_auto.c172 struct udevice *ctlr = pci_get_controller(dev); in dm_pciauto_prescan_setup_bridge() local
173 struct pci_controller *ctlr_hose = dev_get_uclass_priv(ctlr); in dm_pciauto_prescan_setup_bridge()
185 PCI_BUS(dm_pci_get_bdf(dev)) - ctlr->seq); in dm_pciauto_prescan_setup_bridge()
186 dm_pci_write_config8(dev, PCI_SECONDARY_BUS, sub_bus - ctlr->seq); in dm_pciauto_prescan_setup_bridge()
253 struct udevice *ctlr = pci_get_controller(dev); in dm_pciauto_postscan_setup_bridge() local
254 struct pci_controller *ctlr_hose = dev_get_uclass_priv(ctlr); in dm_pciauto_postscan_setup_bridge()
261 dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, sub_bus - ctlr->seq); in dm_pciauto_postscan_setup_bridge()
315 struct udevice *ctlr = pci_get_controller(dev); in dm_pciauto_config_device() local
316 struct pci_controller *ctlr_hose = dev_get_uclass_priv(ctlr); in dm_pciauto_config_device()
Dpci-uclass.c927 hose->ctlr = bus; in pci_uclass_pre_probe()
933 hose->ctlr = parent_hose->bus; in pci_uclass_pre_probe()
1015 return pci_bus_read_config(hose->ctlr, bdf, offset, valuep, size); in pci_bridge_read_config()
1024 return pci_bus_write_config(hose->ctlr, bdf, offset, value, size); in pci_bridge_write_config()
1177 static int _dm_pci_bus_to_phys(struct udevice *ctlr, in _dm_pci_bus_to_phys() argument
1181 struct pci_controller *hose = dev_get_uclass_priv(ctlr); in _dm_pci_bus_to_phys()
1213 struct udevice *ctlr; in dm_pci_bus_to_phys() local
1217 ctlr = pci_get_controller(dev); in dm_pci_bus_to_phys()
1224 ret = _dm_pci_bus_to_phys(ctlr, bus_addr, in dm_pci_bus_to_phys()
1231 ret = _dm_pci_bus_to_phys(ctlr, bus_addr, flags, 0, &phys_addr); in dm_pci_bus_to_phys()
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Dpcie_dw_mvebu.c477 struct udevice *ctlr = pci_get_controller(dev); in pcie_dw_mvebu_probe() local
478 struct pci_controller *hose = dev_get_uclass_priv(ctlr); in pcie_dw_mvebu_probe()
/external/u-boot/include/
Dpci.h545 struct udevice *ctlr; member