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Searched refs:ctrl_ddrio_2 (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/arch/arm/mach-omap2/omap5/
Dhw_data.c665 .ctrl_ddrio_2 = DDR_IO_2_CA_OUT_EN_ALL_CA_INT_EN_ALL,
674 .ctrl_ddrio_2 = DDR_IO_2_VREF_CELLS_DDR3_VALUE,
685 .ctrl_ddrio_2 = DDR_IO_2_VREF_CELLS_DDR3_VALUE_ES2,
696 .ctrl_ddrio_2 = 0x84210000,
708 .ctrl_ddrio_2 = 0x84210000,
720 .ctrl_ddrio_2 = 0x00000000,
Dhwinit.c67 writel(ioregs->ctrl_ddrio_2, (*ctrl)->control_ddrio_2); in io_settings_lpddr2()
89 writel(ioregs->ctrl_ddrio_2, (*ctrl)->control_ddrio_2); in io_settings_ddr3()
/external/u-boot/arch/arm/include/asm/arch-omap5/
Domap.h250 u32 ctrl_ddrio_2; member