| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | neon-shuffle-encoding.s | 81 vtrn.8 d3, d9
82 vtrn.i8 d3, d9
83 vtrn.u8 d3, d9
84 vtrn.p8 d3, d9
85 vtrn.16 d3, d9
86 vtrn.i16 d3, d9
87 vtrn.u16 d3, d9
88 vtrn.p16 d3, d9
89 vtrn.32 d3, d9
90 vtrn.i32 d3, d9
[all …]
|
| D | vpush-vpop.s | 6 vpush {d8, d9, d10, d11, d12}
8 vpop {d8, d9, d10, d11, d12}
11 vpush.s8 {d8, d9, d10, d11, d12}
13 vpop.f32 {d8, d9, d10, d11, d12}
16 @ CHECK-THUMB: vpush {d8, d9, d10, d11, d12} @ encoding: [0x2d,0xed,0x0a,0x8b]
18 @ CHECK-THUMB: vpop {d8, d9, d10, d11, d12} @ encoding: [0xbd,0xec,0x0a,0x8b]
21 @ CHECK-ARM: vpush {d8, d9, d10, d11, d12} @ encoding: [0x0a,0x8b,0x2d,0xed]
23 @ CHECK-ARM: vpop {d8, d9, d10, d11, d12} @ encoding: [0x0a,0x8b,0xbd,0xec]
26 @ CHECK-THUMB: vpush {d8, d9, d10, d11, d12} @ encoding: [0x2d,0xed,0x0a,0x8b]
28 @ CHECK-THUMB: vpop {d8, d9, d10, d11, d12} @ encoding: [0xbd,0xec,0x0a,0x8b]
[all …]
|
| D | eh-directive-integrated-test.s | 40 .vsave {d8, d9, d10, d11, d12}
41 vpush {d8, d9, d10, d11, d12}
45 vpop {d8, d9, d10, d11, d12}
74 .vsave {d8, d9, d10, d11, d12}
75 vpush {d8, d9, d10, d11, d12}
79 vpop {d8, d9, d10, d11, d12}
|
| /external/llvm/test/MC/ARM/ |
| D | neon-shuffle-encoding.s | 81 vtrn.8 d3, d9
82 vtrn.i8 d3, d9
83 vtrn.u8 d3, d9
84 vtrn.p8 d3, d9
85 vtrn.16 d3, d9
86 vtrn.i16 d3, d9
87 vtrn.u16 d3, d9
88 vtrn.p16 d3, d9
89 vtrn.32 d3, d9
90 vtrn.i32 d3, d9
[all …]
|
| D | vpush-vpop.s | 6 vpush {d8, d9, d10, d11, d12}
8 vpop {d8, d9, d10, d11, d12}
11 vpush.s8 {d8, d9, d10, d11, d12}
13 vpop.f32 {d8, d9, d10, d11, d12}
16 @ CHECK-THUMB: vpush {d8, d9, d10, d11, d12} @ encoding: [0x2d,0xed,0x0a,0x8b]
18 @ CHECK-THUMB: vpop {d8, d9, d10, d11, d12} @ encoding: [0xbd,0xec,0x0a,0x8b]
21 @ CHECK-ARM: vpush {d8, d9, d10, d11, d12} @ encoding: [0x0a,0x8b,0x2d,0xed]
23 @ CHECK-ARM: vpop {d8, d9, d10, d11, d12} @ encoding: [0x0a,0x8b,0xbd,0xec]
26 @ CHECK-THUMB: vpush {d8, d9, d10, d11, d12} @ encoding: [0x2d,0xed,0x0a,0x8b]
28 @ CHECK-THUMB: vpop {d8, d9, d10, d11, d12} @ encoding: [0xbd,0xec,0x0a,0x8b]
[all …]
|
| D | eh-directive-integrated-test.s | 40 .vsave {d8, d9, d10, d11, d12}
41 vpush {d8, d9, d10, d11, d12}
45 vpop {d8, d9, d10, d11, d12}
74 .vsave {d8, d9, d10, d11, d12}
75 vpush {d8, d9, d10, d11, d12}
79 vpop {d8, d9, d10, d11, d12}
|
| /external/capstone/suite/MC/ARM/ |
| D | neon-shuffle-encoding.s.cs | 34 0x89,0x30,0xb2,0xf3 = vtrn.8 d3, d9
35 0x89,0x30,0xb2,0xf3 = vtrn.8 d3, d9
36 0x89,0x30,0xb2,0xf3 = vtrn.8 d3, d9
37 0x89,0x30,0xb2,0xf3 = vtrn.8 d3, d9
38 0x89,0x30,0xb6,0xf3 = vtrn.16 d3, d9
39 0x89,0x30,0xb6,0xf3 = vtrn.16 d3, d9
40 0x89,0x30,0xb6,0xf3 = vtrn.16 d3, d9
41 0x89,0x30,0xb6,0xf3 = vtrn.16 d3, d9
42 0x89,0x30,0xba,0xf3 = vtrn.32 d3, d9
43 0x89,0x30,0xba,0xf3 = vtrn.32 d3, d9
[all …]
|
| D | vpush-vpop.s.cs | 2 0x0a,0x8b,0x2d,0xed = vpush {d8, d9, d10, d11, d12}
4 0x0a,0x8b,0xbd,0xec = vpop {d8, d9, d10, d11, d12}
6 0x0a,0x8b,0x2d,0xed = vpush {d8, d9, d10, d11, d12}
8 0x0a,0x8b,0xbd,0xec = vpop {d8, d9, d10, d11, d12}
|
| D | vpush-vpop-thumb.s.cs | 2 0x2d,0xed,0x0a,0x8b = vpush {d8, d9, d10, d11, d12}
4 0xbd,0xec,0x0a,0x8b = vpop {d8, d9, d10, d11, d12}
6 0x2d,0xed,0x0a,0x8b = vpush {d8, d9, d10, d11, d12}
8 0xbd,0xec,0x0a,0x8b = vpop {d8, d9, d10, d11, d12}
|
| /external/libhevc/common/arm/ |
| D | ihevc_itrans_recon_32x32.s | 215 vld1.16 d9,[r0],r6
222 vmlal.s16 q12,d9,d0[3] @// y1 * cos1 + y3 * cos3(part of b0)
223 vmlal.s16 q13,d9,d2[1] @// y1 * cos3 - y3 * sin1(part of b1)
224 vmlal.s16 q14,d9,d3[3] @// y1 * sin3 - y3 * cos1(part of b2)
225 vmlal.s16 q15,d9,d5[1] @// y1 * sin1 - y3 * sin3(part of b3)
284 vld1.16 d9,[r0],r6
292 vmlal.s16 q12,d9,d2[3] @// y1 * cos1 + y3 * cos3(part of b0)
293 vmlsl.s16 q13,d9,d7[3] @// y1 * cos3 - y3 * sin1(part of b1)
294 vmlsl.s16 q14,d9,d2[1] @// y1 * sin3 - y3 * cos1(part of b2)
295 vmlsl.s16 q15,d9,d3[1] @// y1 * sin1 - y3 * sin3(part of b3)
[all …]
|
| D | ihevc_itrans_recon_16x16.s | 233 vld1.16 d9,[r9],r8
276 vmlal.s16 q12,d9,d1[3]
277 vmlsl.s16 q13,d9,d2[3]
278 vmlsl.s16 q14,d9,d0[3]
279 vmlal.s16 q15,d9,d3[3]
313 vld1.16 d9,[r9],r5
336 vmlal.s16 q12,d9,d3[3]
337 vmlsl.s16 q13,d9,d3[1]
338 vmlal.s16 q14,d9,d2[3]
339 vmlsl.s16 q15,d9,d2[1]
[all …]
|
| D | ihevc_intra_pred_luma_mode_3_to_9.s | 204 vsub.s8 d9, d8, d2 @ref_main_idx + 1 (row 0)
208 vtbl.8 d13, {d0,d1}, d9 @load from ref_main_idx + 1 (row 0)
210 vsub.s8 d5, d9, d2 @ref_main_idx + 1 (row 1)
218 vsub.s8 d9, d9, d3 @ref_main_idx + 1 (row 2)
226 vtbl.8 d15, {d0,d1}, d9 @load from ref_main_idx + 1 (row 2)
239 vsub.s8 d9, d9, d3 @ref_main_idx + 1 (row 4)
248 vtbl.8 d13, {d0,d1}, d9 @load from ref_main_idx + 1 (row 4)
261 vsub.s8 d9, d9, d3 @ref_main_idx + 1 (row 6)
270 vtbl.8 d15, {d0,d1}, d9 @load from ref_main_idx + 1 (row 6)
337 vsub.s8 d9, d8, d2 @ref_main_idx - 1
[all …]
|
| D | ihevc_intra_pred_filters_luma_mode_11_to_17.s | 314 vadd.s8 d9, d8, d2 @ref_main_idx + 1 (row 0)
318 vtbl.8 d13, {d0,d1}, d9 @load from ref_main_idx + 1 (row 0)
320 vadd.s8 d5, d9, d2 @ref_main_idx + 1 (row 1)
328 vadd.s8 d9, d9, d3 @ref_main_idx + 1 (row 2)
336 vtbl.8 d15, {d0,d1}, d9 @load from ref_main_idx + 1 (row 2)
349 vadd.s8 d9, d9, d3 @ref_main_idx + 1 (row 4)
358 vtbl.8 d13, {d0,d1}, d9 @load from ref_main_idx + 1 (row 4)
371 vadd.s8 d9, d9, d3 @ref_main_idx + 1 (row 6)
380 vtbl.8 d15, {d0,d1}, d9 @load from ref_main_idx + 1 (row 6)
442 vadd.s8 d9, d2, d8 @ref_main_idx + 1
[all …]
|
| D | ihevc_intra_pred_chroma_mode_3_to_9.s | 195 vmov.i8 d9, #22 @row 0 to 7
199 vadd.s8 d8, d8, d9 @to compensate the pu1_src idx incremented by 8
200 vsub.s8 d9, d8, d29 @ref_main_idx + 1 (row 0)
204 vtbl.8 d13, {d0,d1,d2,d3}, d9 @load from ref_main_idx + 1 (row 0)
206 vsub.s8 d5, d9, d29 @ref_main_idx + 1 (row 1)
216 vsub.s8 d9, d9, d29 @ref_main_idx + 1 (row 2)
224 vtbl.8 d15, {d0,d1,d2,d3}, d9 @load from ref_main_idx + 1 (row 2)
237 vsub.s8 d9, d9, d29 @ref_main_idx + 1 (row 4)
246 vtbl.8 d13, {d0,d1,d2,d3}, d9 @load from ref_main_idx + 1 (row 4)
259 vsub.s8 d9, d9, d29 @ref_main_idx + 1 (row 6)
[all …]
|
| D | ihevc_intra_pred_luma_planar.s | 187 vsub.s8 d9, d2, d8 @(1-8)[nt-1-col]
199 vmlal.u8 q6, d9, d20 @(1)(nt-1-col) * src[2nt-1-row]
213 vmlal.u8 q15, d9, d21 @(2)
230 vmlal.u8 q14, d9, d22 @(3)
247 vmlal.u8 q5, d9, d23 @(4)
264 vmlal.u8 q8, d9, d20 @(5)
280 vmlal.u8 q9, d9, d21 @(6)
297 vmlal.u8 q13, d9, d22 @(7)
313 vmlal.u8 q12, d9, d23 @(8)
339 vsub.s8 d9, d2, d8 @(1n)(1-8)[nt-1-col]
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | cfi-alignment.ll | 11 ; CHECK: vpush {d8, d9}
13 ; CHECK: .cfi_offset d9, -24
15 call void asm sideeffect "", "~{d8},~{d9},~{d11}"()
27 ; CHECK: vpush {d8, d9}
29 ; CHECK: .cfi_offset d9, -40
31 call void asm sideeffect "", "~{d8},~{d9},~{d11}"()
40 ; CHECK: vpush {d8, d9}
42 call void asm sideeffect "", "~{d8},~{d9}"()
|
| D | v7k-abi-align.ll | 35 ; CHECK: vpush {d8, d9}
36 ; CHECK: .cfi_offset d9, -24
41 ; CHECK: vpop {d8, d9}
45 call void asm sideeffect "", "~{r6},~{d8},~{d9}"()
53 ; adjustment needs to be performed to put d8 and d9 where they should be.
60 ; CHECK: vpush {d8, d9}
61 ; CHECK: .cfi_offset d9, -40
66 ; CHECK: vpop {d8, d9}
71 call void asm sideeffect "", "~{r4},~{r5},~{r6},~{r7},~{r8},~{d8},~{d9}"()
83 ; CHECK: vpush {d8, d9}
[all …]
|
| /external/llvm/test/CodeGen/ARM/ |
| D | cfi-alignment.ll | 11 ; CHECK: vpush {d8, d9}
13 ; CHECK: .cfi_offset d9, -24
15 call void asm sideeffect "", "~{d8},~{d9},~{d11}"()
27 ; CHECK: vpush {d8, d9}
29 ; CHECK: .cfi_offset d9, -40
31 call void asm sideeffect "", "~{d8},~{d9},~{d11}"()
40 ; CHECK: vpush {d8, d9}
42 call void asm sideeffect "", "~{d8},~{d9}"()
|
| D | v7k-abi-align.ll | 35 ; CHECK: vpush {d8, d9}
36 ; CHECK: .cfi_offset d9, -24
41 ; CHECK: vpop {d8, d9}
45 call void asm sideeffect "", "~{r6},~{d8},~{d9}"()
53 ; adjustment needs to be performed to put d8 and d9 where they should be.
60 ; CHECK: vpush {d8, d9}
61 ; CHECK: .cfi_offset d9, -40
66 ; CHECK: vpop {d8, d9}
71 call void asm sideeffect "", "~{r4},~{r5},~{r6},~{r7},~{r8},~{d8},~{d9}"()
83 ; CHECK: vpush {d8, d9}
[all …]
|
| D | vfp-regs-dwarf.ll | 5 ; asm("" ::: "d8", "d9", "d11", "d13");
17 ; CHECK: vpush {d8, d9}
21 ; CHECK: .cfi_offset {{265|d9}}, -24
24 ; CHECK: vpop {d8, d9}
27 call void asm sideeffect "", "~{d8},~{d9},~{d11},~{d13}"() #1
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | vpush-vpop.s | 6 vpush {d8, d9, d10, d11, d12}
8 vpop {d8, d9, d10, d11, d12}
11 @ CHECK-THUMB: vpush {d8, d9, d10, d11, d12} @ encoding: [0x2d,0xed,0x0a,0x8b]
13 @ CHECK-THUMB: vpop {d8, d9, d10, d11, d12} @ encoding: [0xbd,0xec,0x0a,0x8b]
16 @ CHECK-ARM: vpush {d8, d9, d10, d11, d12} @ encoding: [0x0a,0x8b,0x2d,0xed]
18 @ CHECK-ARM: vpop {d8, d9, d10, d11, d12} @ encoding: [0x0a,0x8b,0xbd,0xec]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | neont2.txt | 1659 # CHECK: vst1.8 {d8, d9}, [r4]!
1661 # CHECK: vst1.16 {d8, d9}, [r4]!
1663 # CHECK: vst1.32 {d8, d9}, [r4]!
1665 # CHECK: vst1.64 {d8, d9}, [r4]!
1667 # CHECK: vst1.8 {d8, d9}, [r4], r6
1669 # CHECK: vst1.16 {d8, d9}, [r4], r6
1671 # CHECK: vst1.32 {d8, d9}, [r4], r6
1673 # CHECK: vst1.64 {d8, d9}, [r4], r6
1676 # CHECK: vst1.8 {d8, d9, d10}, [r4]!
1678 # CHECK: vst1.16 {d8, d9, d10}, [r4]!
[all …]
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | neont2.txt | 1659 # CHECK: vst1.8 {d8, d9}, [r4]!
1661 # CHECK: vst1.16 {d8, d9}, [r4]!
1663 # CHECK: vst1.32 {d8, d9}, [r4]!
1665 # CHECK: vst1.64 {d8, d9}, [r4]!
1667 # CHECK: vst1.8 {d8, d9}, [r4], r6
1669 # CHECK: vst1.16 {d8, d9}, [r4], r6
1671 # CHECK: vst1.32 {d8, d9}, [r4], r6
1673 # CHECK: vst1.64 {d8, d9}, [r4], r6
1676 # CHECK: vst1.8 {d8, d9, d10}, [r4]!
1678 # CHECK: vst1.16 {d8, d9, d10}, [r4]!
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb2/ |
| D | aligned-spill.ll | 17 …tail call void asm sideeffect "", "~{d8},~{d9},~{d10},~{d11},~{d12},~{d13},~{d14},~{d15}"() nounwi…
29 ; NEON: vst1.64 {d8, d9, d10, d11}, [r4:128]!
39 ; NEON: vld1.64 {d8, d9, d10, d11}, [r[[R4]]:128]!
50 tail call void asm sideeffect "", "~{d8},~{d9},~{d10},~{d11},~{d12},~{d13},~{d14}"() nounwind
60 ; NEON: vst1.64 {d8, d9, d10, d11}, [r4:128]!
64 ; NEON: vld1.64 {d8, d9, d10, d11},
74 tail call void asm sideeffect "", "~{d8},~{d9},~{d10},~{d12},~{d13},~{d14},~{d15}"() nounwind
87 ; NEON: vst1.64 {d8, d9}, [r4:128]
90 ; NEON: vld1.64 {d8, d9},
|
| /external/llvm/test/CodeGen/Thumb2/ |
| D | aligned-spill.ll | 17 …tail call void asm sideeffect "", "~{d8},~{d9},~{d10},~{d11},~{d12},~{d13},~{d14},~{d15}"() nounwi…
29 ; NEON: vst1.64 {d8, d9, d10, d11}, [r4:128]!
39 ; NEON: vld1.64 {d8, d9, d10, d11}, [r[[R4]]:128]!
50 tail call void asm sideeffect "", "~{d8},~{d9},~{d10},~{d11},~{d12},~{d13},~{d14}"() nounwind
60 ; NEON: vst1.64 {d8, d9, d10, d11}, [r4:128]!
64 ; NEON: vld1.64 {d8, d9, d10, d11},
74 tail call void asm sideeffect "", "~{d8},~{d9},~{d10},~{d12},~{d13},~{d14},~{d15}"() nounwind
87 ; NEON: vst1.64 {d8, d9}, [r4:128]
90 ; NEON: vld1.64 {d8, d9},
|