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/external/u-boot/arch/arm/dts/
Dzynqmp-mini-emmc1.dts19 serial0 = &dcc;
32 dcc: dcc { label
33 compatible = "arm,dcc";
61 &dcc {
Dzynqmp-mini-emmc0.dts19 serial0 = &dcc;
32 dcc: dcc { label
33 compatible = "arm,dcc";
61 &dcc {
Dzynqmp-mini-nand.dts20 serial0 = &dcc;
32 dcc: dcc { label
33 compatible = "arm,dcc";
106 &dcc {
Dzynq-cse-qspi.dtsi17 serial0 = &dcc;
29 dcc: dcc { label
30 compatible = "arm,dcc";
123 &dcc {
Dzynqmp-zc1275-revA.dts22 serial1 = &dcc;
37 &dcc {
Dzynqmp-zc1254-revA.dts22 serial1 = &dcc;
37 &dcc {
Dzynqmp-zc1275-revB.dts22 serial1 = &dcc;
38 &dcc {
Dzynqmp-zc1232-revA.dts22 serial1 = &dcc;
37 &dcc {
Dzynqmp-zcu104-revA.dts29 serial2 = &dcc;
49 &dcc {
Dzynqmp-zcu104-revC.dts29 serial2 = &dcc;
49 &dcc {
Dzynqmp-zcu100-revC.dts30 serial2 = &dcc;
128 &dcc {
Dzynqmp-zcu111-revA.dts30 serial1 = &dcc;
68 &dcc {
Dzynqmp-zcu102-revA.dts31 serial2 = &dcc;
72 &dcc {
Dzynqmp-zcu106-revA.dts31 serial2 = &dcc;
72 &dcc {
Dzynqmp.dtsi99 dcc: dcc { label
100 compatible = "arm,dcc";
/external/mesa3d/src/gallium/drivers/r600/sb/
Dsb_peephole.cpp249 unsigned dcc = dflags & AF_CC_MASK; in optimize_CNDcc_op() local
275 if (dcc == AF_CC_NE) { in optimize_CNDcc_op()
276 dcc = AF_CC_E; in optimize_CNDcc_op()
281 switch (dcc) { in optimize_CNDcc_op()
282 case AF_CC_GT: dcc = AF_CC_GE; swap = !swap; break; in optimize_CNDcc_op()
283 case AF_CC_GE: dcc = AF_CC_GT; swap = !swap; break; in optimize_CNDcc_op()
296 a->bc.set_op(get_cndcc_op(dcc, dcmp_type)); in optimize_CNDcc_op()
/external/grpc-grpc/src/python/grpcio_tests/tests/unit/credentials/certificate_hierarchy_1/intermediate/private/
Dclient.key.pem5 Jq6aoKfs791a1ZkZde3kFrNVAVjC06GgA1lZd3sHf94hmLeC+xJztRXVE9e+7dcc
/external/mesa3d/src/amd/common/
Dac_surface.h128 struct gfx9_surf_meta_flags dcc; /* metadata of color */ member
Dac_surface.c955 surf->u.gfx9.dcc.rb_aligned = din.dccKeyFlags.rbAligned; in gfx9_compute_miptree()
956 surf->u.gfx9.dcc.pipe_aligned = din.dccKeyFlags.pipeAligned; in gfx9_compute_miptree()
/external/hyphenation-patterns/pt/
Dhyph-pt.lic.txt5 % Author: Pedro J. de Rezende <rezende at dcc.unicamp.br>, J.Joao Dias Almeida <jj at di.uminho.pt>
/external/icu/icu4c/source/data/rbnf/
Droot.txt554 "700: dcc[>>];",
/external/clang/docs/
DControlFlowIntegrityDesign.rst141 dcc: 48 89 c1 mov %rax,%rcx
/external/mesa3d/src/amd/vulkan/
Dradv_image.c302 meta = image->surface.u.gfx9.dcc; in si_set_mutable_tex_desc_fields()
/external/arm-optimized-routines/test/testcases/directed/
Drred5.tst262 func=rred op1=76847d0a.783dd4a9 result=3cc01991.913b9a2c.dcc res2=00000003 errno=0
556 func=rred op1=7fb0cab5.b36ef5c5 result=3cd46c6d.3b1c2a77.dcc res2=00000003 errno=0
/external/icu/icu4c/source/data/misc/
DlikelySubtags.txt274 dcc{"dcc_Arab_IN"}

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