Searched refs:dcc_size (Results 1 – 11 of 11) sorted by relevance
| /external/mesa3d/src/amd/common/ |
| D | ac_surface.c | 349 surf_level->dcc_offset = surf->dcc_size; in gfx6_compute_level()
352 surf->dcc_size = surf_level->dcc_offset + AddrDccOut->dccRamSize; in gfx6_compute_level()
686 surf->dcc_size = 0; in gfx6_compute_surface()
783 if (surf->dcc_size && config->info.levels > 1) { in gfx6_compute_surface()
792 surf->dcc_size = align64(surf->surf_size >> 8, in gfx6_compute_surface()
958 surf->dcc_size = dout.dccRamSize; in gfx9_compute_miptree()
992 surf->dcc_size = 0; in gfx9_compute_miptree()
1149 surf->dcc_size = 0; in gfx9_compute_surface()
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| D | ac_surface.h | 191 uint32_t dcc_size; member
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| /external/mesa3d/src/amd/vulkan/ |
| D | radv_meta_fast_clear.c | 596 if (decompress_dcc && image->surface.dcc_size) { in radv_emit_color_decompress()
604 if (!decompress_dcc && image->surface.dcc_size) { in radv_emit_color_decompress()
670 if (image->surface.dcc_size) { in radv_emit_color_decompress()
776 image->surface.dcc_size, 0xffffffff); in radv_decompress_dcc_compute()
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| D | radv_image.c | 799 image->clear_value_offset = image->dcc_offset + image->surface.dcc_size; in radv_image_alloc_dcc()
801 image->size = image->dcc_offset + image->surface.dcc_size + 16; in radv_image_alloc_dcc()
837 image->surface.dcc_size; in radv_image_can_enable_dcc()
933 image->surface.dcc_size = 0; in radv_image_create()
953 image->surface.dcc_size = 0; in radv_image_create()
1175 return image->surface.dcc_size && layout != VK_IMAGE_LAYOUT_GENERAL; in radv_layout_dcc_compressed()
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| D | radv_meta_resolve.c | 449 if (dest_image->surface.dcc_size) { in radv_CmdResolveImage()
651 if (dst_img->surface.dcc_size) { in radv_cmd_buffer_resolve_subpass()
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| D | radv_meta_clear.c | 957 if (!iview->image->cmask.size && !iview->image->surface.dcc_size) in emit_fast_color_clear()
998 if (!iview->image->surface.dcc_size && in emit_fast_color_clear()
1016 if (iview->image->surface.dcc_size) { in emit_fast_color_clear()
1025 iview->image->surface.dcc_size, reset_value); in emit_fast_color_clear()
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| D | radv_meta_copy.c | 92 if (!image->surface.dcc_size && in blit_surf_for_image_level_layer()
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| D | radv_cmd_buffer.c | 1436 assert(image->surface.dcc_size); in radv_set_dcc_need_cmask_elim_pred()
1457 assert(image->cmask.size || image->surface.dcc_size); in radv_set_color_clear_regs()
1481 if (!image->cmask.size && !image->surface.dcc_size) in radv_load_color_clear_regs()
4000 image->surface.dcc_size, value); in radv_initialize_dcc()
4069 if (image->surface.dcc_size) in radv_handle_image_transition()
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| D | radv_private.h | 1420 return image->surface.dcc_size && level < image->surface.num_dcc_levels; in radv_vi_dcc_enabled()
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | r600_texture.c | 1103 rtex->dcc_offset, rtex->surface.dcc_size, in si_print_texture_info()
1147 rtex->dcc_offset, rtex->surface.dcc_size, in si_print_texture_info()
1282 if (rtex->surface.dcc_size && in r600_texture_create_object()
1287 rtex->size = rtex->dcc_offset + rtex->surface.dcc_size; in r600_texture_create_object()
1334 rtex->surface.dcc_size, in r600_texture_create_object()
2255 !tex->surface.dcc_size) in vi_separate_dcc_try_enable()
2286 tex->surface.dcc_size, in vi_separate_dcc_try_enable()
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| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_clear.c | 215 clear_size = rtex->surface.dcc_size; in vi_dcc_clear_level()
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