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Searched refs:ddr_sdram_interval (Results 1 – 17 of 17) sorted by relevance

/external/u-boot/board/freescale/corenet_ds/
Dp4080ds_ddr.c96 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_800,
128 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_800,
160 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_900,
192 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_900,
224 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_1000,
256 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_1000,
288 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_1200,
320 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_1200,
/external/u-boot/board/freescale/bsc9132qds/
Dddr.c30 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_800,
57 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_1333,
/external/u-boot/board/freescale/p1010rdb/
Dddr.c33 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_800,
60 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_667,
/external/u-boot/board/freescale/p1_twr/
Dddr.c39 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL, in fixed_sdram()
/external/u-boot/board/freescale/ls1043ardb/
Dddr.h82 .ddr_sdram_interval = 0x18600618,
/external/u-boot/drivers/ddr/fsl/
Dmpc85xx_ddr_gen3.c127 out_be32(&ddr->sdram_interval, regs->ddr_sdram_interval); in fsl_ddr_set_memctl_regs()
213 out_be32(&ddr->sdram_interval, regs->ddr_sdram_interval & 0xffff); in fsl_ddr_set_memctl_regs()
335 out_be32(&ddr->sdram_interval, regs->ddr_sdram_interval); in fsl_ddr_set_memctl_regs()
Dmpc85xx_ddr_gen1.c48 out_be32(&ddr->sdram_interval, regs->ddr_sdram_interval); in fsl_ddr_set_memctl_regs()
Dmpc86xx_ddr.c59 out_be32(&ddr->sdram_interval, regs->ddr_sdram_interval); in fsl_ddr_set_memctl_regs()
Dfsl_ddr_gen4.c190 regs->ddr_sdram_interval & ~SDRAM_INTERVAL_BSTOPRE); in fsl_ddr_set_memctl_regs()
192 ddr_out32(&ddr->sdram_interval, regs->ddr_sdram_interval); in fsl_ddr_set_memctl_regs()
491 ddr_out32(&ddr->sdram_interval, regs->ddr_sdram_interval); in fsl_ddr_set_memctl_regs()
Dmpc85xx_ddr_gen2.c74 out_be32(&ddr->sdram_interval, regs->ddr_sdram_interval); in fsl_ddr_set_memctl_regs()
Darm_ddr_gen3.c104 ddr_out32(&ddr->sdram_interval, regs->ddr_sdram_interval); in fsl_ddr_set_memctl_regs()
Dctrl_regs.c1338 ddr->ddr_sdram_interval = (0 in set_ddr_sdram_interval()
1342 debug("FSLDDR: ddr_sdram_interval = 0x%08x\n", ddr->ddr_sdram_interval); in set_ddr_sdram_interval()
Dinteractive.c653 CFG_REGS(ddr_sdram_interval), in print_fsl_memctl_config_regs()
744 CFG_REGS(ddr_sdram_interval), in fsl_ddr_regs_edit()
/external/u-boot/board/Arcturus/ucp1020/
Dddr.c99 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL, in fixed_sdram()
/external/u-boot/board/freescale/bsc9131rdb/
Dddr.c31 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_800,
/external/u-boot/board/freescale/p1_p2_rdb_pc/
Dddr.c231 .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL, in fixed_sdram()
/external/u-boot/include/
Dfsl_ddr_sdram.h272 unsigned int ddr_sdram_interval; member