Searched refs:ddr_wrlvl_cntl_2 (Results 1 – 10 of 10) sorted by relevance
117 if (regs->ddr_wrlvl_cntl_2) in fsl_ddr_set_memctl_regs()118 ddr_out32(&ddr->ddr_wrlvl_cntl_2, regs->ddr_wrlvl_cntl_2); in fsl_ddr_set_memctl_regs()
140 if (regs->ddr_wrlvl_cntl_2) in fsl_ddr_set_memctl_regs()141 out_be32(&ddr->ddr_wrlvl_cntl_2, regs->ddr_wrlvl_cntl_2); in fsl_ddr_set_memctl_regs()
202 if (regs->ddr_wrlvl_cntl_2) in fsl_ddr_set_memctl_regs()203 ddr_out32(&ddr->ddr_wrlvl_cntl_2, regs->ddr_wrlvl_cntl_2); in fsl_ddr_set_memctl_regs()
2293 ddr->ddr_wrlvl_cntl_2 = popts->wrlvl_ctl_2; in set_ddr_wrlvl_cntl()2294 debug("FSLDDR: wrlvl_cntl_2 = 0x%08x\n", ddr->ddr_wrlvl_cntl_2); in set_ddr_wrlvl_cntl()
668 CFG_REGS(ddr_wrlvl_cntl_2), in print_fsl_memctl_config_regs()759 CFG_REGS(ddr_wrlvl_cntl_2), in fsl_ddr_regs_edit()
95 .ddr_wrlvl_cntl_2 = 0x07090800,
74 out_be32(&ddr->ddr_wrlvl_cntl_2, DDR_DDR_WRLVL_CNTL_2); in ddrmc_init()
61 u32 ddr_wrlvl_cntl_2; /* write leveling control 2 */ member
285 unsigned int ddr_wrlvl_cntl_2; member
180 out_be32(&ddr->ddr_wrlvl_cntl_2, DDR_DDR_WRLVL_CNTL_2); in ddrmc_init()