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Searched refs:ddrphy_mr0 (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-uniphier/dram/
Dddrphy-ld4.c28 static u32 ddrphy_mr0[DRAM_FREQ_NR] = {0x00000b51, 0x00000d71}; variable
66 writel(ddrphy_mr0[freq_e], phy_base + PHY_MR0); in uniphier_ld4_ddrphy_init()
Dumc-pxs2.c47 static u32 ddrphy_mr0[DRAM_FREQ_NR] = {0x00000115, 0x00000125}; variable
187 writel(ddrphy_mr0[freq], phy_base + MPHY_MR0); in ddrphy_init()