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Searched refs:depth_range_dirty_mask (Results 1 – 7 of 7) sorted by relevance

/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_state_viewport.c282 ctx->viewports.depth_range_dirty_mask |= mask; in si_set_viewport_states()
347 unsigned mask = ctx->viewports.depth_range_dirty_mask; in si_emit_depth_ranges()
366 ctx->viewports.depth_range_dirty_mask &= ~1; /* clear one bit */ in si_emit_depth_ranges()
384 ctx->viewports.depth_range_dirty_mask = 0; in si_emit_depth_ranges()
420 ctx->viewports.depth_range_dirty_mask = (1 << SI_MAX_VIEWPORTS) - 1; in si_update_vs_viewport_state()
434 ctx->viewports.depth_range_dirty_mask) in si_update_vs_viewport_state()
Dsi_hw_context.c263 ctx->viewports.depth_range_dirty_mask = (1 << SI_MAX_VIEWPORTS) - 1; in si_begin_new_cs()
Dsi_pipe.h310 unsigned depth_range_dirty_mask; member
Dsi_state.c1039 sctx->viewports.depth_range_dirty_mask = (1 << SI_MAX_VIEWPORTS) - 1; in si_bind_rs_state()
/external/mesa3d/src/gallium/drivers/r600/
Dr600_viewport.c300 rctx->viewports.depth_range_dirty_mask |= mask; in r600_set_viewport_states()
353 unsigned mask = rctx->viewports.depth_range_dirty_mask; in r600_emit_depth_ranges()
366 rctx->viewports.depth_range_dirty_mask &= ~1; /* clear one bit */ in r600_emit_depth_ranges()
383 rctx->viewports.depth_range_dirty_mask = 0; in r600_emit_depth_ranges()
404 rctx->viewports.depth_range_dirty_mask = (1 << R600_MAX_VIEWPORTS) - 1; in r600_viewport_set_rast_deps()
442 rctx->viewports.depth_range_dirty_mask) in r600_update_vs_writes_viewport_index()
Dr600_pipe_common.h485 unsigned depth_range_dirty_mask; member
Dr600_hw_context.c364 ctx->b.viewports.depth_range_dirty_mask = (1 << R600_MAX_VIEWPORTS) - 1; in r600_begin_new_cs()