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/external/parameter-framework/asio-1.10.6/include/asio/detail/
Dhandler_type_requirements.hpp57 namespace detail { namespace
112detail::zero_arg_handler_test( asio::detail::clvref< asio_true_handler_typ…
114detail::two_arg_handler_test( asio::detail::clvref< asio_true_handler_type…
117detail::two_arg_handler_test( asio::detail::clvref< asio_true_handler_type…
119detail::one_arg_handler_test( asio::detail::clvref< asio_true_handler_type…
121detail::one_arg_handler_test( asio::detail::clvref< asio_true_handler_type…
123detail::two_arg_handler_test( asio::detail::clvref< asio_true_handler_type…
125detail::two_arg_handler_test( asio::detail::clvref< asio_true_handler_type…
127detail::one_arg_handler_test( asio::detail::clvref< asio_true_handler_type…
129detail::two_arg_handler_test( asio::detail::clvref< asio_true_handler_type…
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/external/capstone/arch/AArch64/
DAArch64InstPrinter.c50 if (MI->csh->detail != CS_OPT_ON) in set_mem_access()
56 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_MEM; in set_mem_access()
57 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.base = ARM64_REG_… in set_mem_access()
58 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.index = ARM64_REG… in set_mem_access()
59 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].mem.disp = 0; in set_mem_access()
62 MI->flat_insn->detail->arm64.op_count++; in set_mem_access()
118 if (MI->csh->detail) { in AArch64_printInst()
119 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].type = ARM64_OP_REG; in AArch64_printInst()
120 …MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].reg = MCOperand_getRe… in AArch64_printInst()
121 MI->flat_insn->detail->arm64.op_count++; in AArch64_printInst()
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/external/capstone/arch/XCore/
DXCoreInstPrinter.c67 if (MI->csh->detail) { in XCore_insn_extract()
68 … MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].type = XCORE_OP_REG; in XCore_insn_extract()
69 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].reg = id; in XCore_insn_extract()
70 MI->flat_insn->detail->xcore.op_count++; in XCore_insn_extract()
89 if (MI->csh->detail) { in XCore_insn_extract()
90 … MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].type = XCORE_OP_MEM; in XCore_insn_extract()
91 …MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.base = (uint8_t)i… in XCore_insn_extract()
92 …MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.index = XCORE_REG… in XCore_insn_extract()
93 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.disp = 0; in XCore_insn_extract()
94 MI->flat_insn->detail->xcore.operands[MI->flat_insn->detail->xcore.op_count].mem.direct = 1; in XCore_insn_extract()
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/external/capstone/arch/ARM/
DARMInstPrinter.c124 if (MI->csh->detail != CS_OPT_ON) in set_mem_access()
129 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_MEM; in set_mem_access()
130 …MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.base = ARM_REG_INVALI… in set_mem_access()
131 …MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.index = ARM_REG_INVAL… in set_mem_access()
132 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.scale = 1; in set_mem_access()
133 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].mem.disp = 0; in set_mem_access()
136 MI->flat_insn->detail->arm.op_count++; in set_mem_access()
142 if (MI->csh->detail) { in op_addImm()
143 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].type = ARM_OP_IMM; in op_addImm()
144 MI->flat_insn->detail->arm.operands[MI->flat_insn->detail->arm.op_count].imm = v; in op_addImm()
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/external/capstone/arch/SystemZ/
DSystemZInstPrinter.c62 if (MI->csh->detail) { in printAddress()
63 MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_MEM; in printAddress()
64 …MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.base = (uint8_t)Sys… in printAddress()
65 …MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.index = (uint8_t)Sy… in printAddress()
66 MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].mem.disp = Disp; in printAddress()
67 MI->flat_insn->detail->sysz.op_count++; in printAddress()
70 if (MI->csh->detail) { in printAddress()
71 MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].type = SYSZ_OP_IMM; in printAddress()
72 MI->flat_insn->detail->sysz.operands[MI->flat_insn->detail->sysz.op_count].imm = Disp; in printAddress()
73 MI->flat_insn->detail->sysz.op_count++; in printAddress()
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/external/Reactive-Extensions/RxCpp/Rx/v2/src/rxcpp/
Drx-subscriber.hpp208 -> typename std::enable_if<detail::is_unsubscribe_function<F>::value, weak_subscription>::type { in add()
236 detail::is_on_next_of<T, detail::OnNextEmpty<T>>::value, in make_subscriber()
237 … subscriber<T, observer<T, detail::stateless_observer_tag, detail::OnNextEmpty<T>>>>::type { in make_subscriber()
238 …return subscriber<T, observer<T, detail::stateless_observer_tag, detail::OnNextEmpty<T>>>(trace… in make_subscriber()
239 … observer<T, detail::stateless_observer_tag, detail::OnNextEmpty<T>>(detail::OnNextEmpty<T>())); in make_subscriber()
259 !detail::is_on_next_of<T, Observer>::value && in make_subscriber()
269 detail::is_on_next_of<T, OnNext>::value, in make_subscriber()
270 subscriber<T, observer<T, detail::stateless_observer_tag, OnNext>>>::type { in make_subscriber()
271 …return subscriber<T, observer<T, detail::stateless_observer_tag, OnNext>>(trace_id::make_next_i… in make_subscriber()
272 observer<T, detail::stateless_observer_tag, OnNext>(on)); in make_subscriber()
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Drx-observer.hpp20 namespace detail { namespace
187 detail::OnNextForward<T, State, OnNext>>::type;
191 detail::OnErrorForward<State, OnError>>::type;
195 detail::OnCompletedForward<State, OnCompleted>>::type;
270 class observer<T, detail::stateless_observer_tag, OnNext, OnError, OnCompleted> : public observer_b…
273 using this_type = observer<T, detail::stateless_observer_tag, OnNext, OnError, OnCompleted>;
277 detail::OnNextEmpty<T>>::type;
281 detail::OnErrorEmpty>::type;
285 detail::OnCompletedEmpty>::type;
293 …static_assert(detail::is_on_next_of<T, on_next_t>::value, "Function supplied for on_next must …
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/external/capstone/arch/X86/
DX86ATTInstPrinter.c55 if (MI->csh->detail != CS_OPT_ON) in set_mem_access()
61 MI->flat_insn->detail->x86.op_count++; in set_mem_access()
272 if (MI->csh->detail) { in printSrcIdx()
273 MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_MEM; in printSrcIdx()
274 MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->x86opsize; in printSrcIdx()
275 …MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = X86_REG_INV… in printSrcIdx()
276 …MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.base = X86_REG_INVALI… in printSrcIdx()
277 …MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.index = X86_REG_INVAL… in printSrcIdx()
278 MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.scale = 1; in printSrcIdx()
279 MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = 0; in printSrcIdx()
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DX86IntelInstPrinter.c54 if (MI->csh->detail != CS_OPT_ON) in set_mem_access()
60 MI->flat_insn->detail->x86.op_count++; in set_mem_access()
298 if (MI->csh->detail) { in printSrcIdx()
299 MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_MEM; in printSrcIdx()
300 MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->x86opsize; in printSrcIdx()
301 …MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.segment = X86_REG_INV… in printSrcIdx()
302 …MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.base = X86_REG_INVALI… in printSrcIdx()
303 …MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.index = X86_REG_INVAL… in printSrcIdx()
304 MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.scale = 1; in printSrcIdx()
305 MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].mem.disp = 0; in printSrcIdx()
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/external/capstone/arch/Sparc/
DSparcInstPrinter.c48 if (MI->csh->detail) { in Sparc_add_hint()
49 MI->flat_insn->detail->sparc.hint = hint; in Sparc_add_hint()
55 if (MI->csh->detail) { in Sparc_add_reg()
56 MI->flat_insn->detail->sparc.operands[MI->flat_insn->detail->sparc.op_count].type = SPARC_OP_REG; in Sparc_add_reg()
57 MI->flat_insn->detail->sparc.operands[MI->flat_insn->detail->sparc.op_count].reg = reg; in Sparc_add_reg()
58 MI->flat_insn->detail->sparc.op_count++; in Sparc_add_reg()
64 if (MI->csh->detail != CS_OPT_ON) in set_mem_access()
70 MI->flat_insn->detail->sparc.operands[MI->flat_insn->detail->sparc.op_count].type = SPARC_OP_MEM; in set_mem_access()
71 …MI->flat_insn->detail->sparc.operands[MI->flat_insn->detail->sparc.op_count].mem.base = SPARC_REG_… in set_mem_access()
72 MI->flat_insn->detail->sparc.operands[MI->flat_insn->detail->sparc.op_count].mem.disp = 0; in set_mem_access()
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/external/capstone/bindings/ocaml/
Docaml.c66 if (insn[0].detail) { in _cs_disasm()
67 lcount = (insn[j-1]).detail->regs_read_count; in _cs_disasm()
71 Store_field(array, i, Val_int(insn[j-1].detail->regs_read[i])); in _cs_disasm()
79 if (insn[0].detail) { in _cs_disasm()
80 lcount = (insn[j-1]).detail->regs_write_count; in _cs_disasm()
84 Store_field(array, i, Val_int(insn[j-1].detail->regs_write[i])); in _cs_disasm()
92 if (insn[0].detail) { in _cs_disasm()
93 lcount = (insn[j-1]).detail->groups_count; in _cs_disasm()
97 Store_field(array, i, Val_int(insn[j-1].detail->groups[i])); in _cs_disasm()
105 if (insn[j-1].detail) { in _cs_disasm()
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/external/swiftshader/third_party/LLVM/include/llvm/Support/
DEndian.h27 namespace detail {
54 reinterpret_cast<const detail::alignment_access_helper
65 reinterpret_cast<detail::alignment_access_helper<value_type, align> *>
72 reinterpret_cast<const detail::alignment_access_helper
83 reinterpret_cast<detail::alignment_access_helper<value_type, align> *>
88 namespace detail {
137 typedef detail::packed_endian_specific_integral
139 typedef detail::packed_endian_specific_integral
141 typedef detail::packed_endian_specific_integral
143 typedef detail::packed_endian_specific_integral
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/external/capstone/arch/PowerPC/
DPPCInstPrinter.c46 if (MI->csh->detail != CS_OPT_ON) in set_mem_access()
52 MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].type = PPC_OP_MEM; in set_mem_access()
53 …MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].mem.base = PPC_REG_INVALI… in set_mem_access()
54 MI->flat_insn->detail->ppc.operands[MI->flat_insn->detail->ppc.op_count].mem.disp = 0; in set_mem_access()
57 MI->flat_insn->detail->ppc.op_count++; in set_mem_access()
63 if (((cs_struct *)ud)->detail != CS_OPT_ON) in PPC_post_printer()
68 insn->detail->ppc.bh = PPC_BH_PLUS; in PPC_post_printer()
70 insn->detail->ppc.bh = PPC_BH_MINUS; in PPC_post_printer()
115 if (MI->csh->detail) { in PPC_printInst()
116 cs_ppc *ppc = &MI->flat_insn->detail->ppc; in PPC_printInst()
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/external/webrtc/webrtc/base/
Dbind.h73 namespace detail {
143 typename detail::PointerType<ObjectT>::type object_;
211 typename detail::PointerType<ObjectT>::type object_;
236 typename detail::identity<P1>::type p1) {
248 typename detail::identity<P1>::type p1) {
260 typename detail::identity<P1>::type p1) {
272 typename detail::identity<P1>::type p1) {
294 typename detail::PointerType<ObjectT>::type object_;
324 typename detail::identity<P1>::type p1,
325 typename detail::identity<P2>::type p2) {
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/external/swiftshader/third_party/llvm-subzero/include/llvm/Support/
DEndian.h27 namespace detail {
53 (detail::PickAlignment<value_type, alignment>::value)), in read()
75 (detail::PickAlignment<value_type, alignment>::value)), in write()
95 memory, (detail::PickAlignment<value_type, alignment>::value)), in readAtBitAlignment()
130 memory, (detail::PickAlignment<value_type, alignment>::value)), in writeAtBitAlignment()
164 memory, (detail::PickAlignment<value_type, alignment>::value)), in writeAtBitAlignment()
170 namespace detail {
232 typedef detail::packed_endian_specific_integral
234 typedef detail::packed_endian_specific_integral
236 typedef detail::packed_endian_specific_integral
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/external/llvm/include/llvm/Support/
DEndian.h28 namespace detail {
54 (detail::PickAlignment<value_type, alignment>::value)), in read()
76 (detail::PickAlignment<value_type, alignment>::value)), in write()
96 memory, (detail::PickAlignment<value_type, alignment>::value)), in readAtBitAlignment()
131 memory, (detail::PickAlignment<value_type, alignment>::value)), in writeAtBitAlignment()
165 memory, (detail::PickAlignment<value_type, alignment>::value)), in writeAtBitAlignment()
171 namespace detail {
233 typedef detail::packed_endian_specific_integral
235 typedef detail::packed_endian_specific_integral
237 typedef detail::packed_endian_specific_integral
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/external/tensorflow/tensorflow/core/util/
Dstats_calculator.cc68 std::string StatsCalculator::ColumnString(const Detail& detail, in ColumnString() argument
71 const double start_ms = detail.start_us.avg() / 1000.0; in ColumnString()
72 const double first_time_ms = detail.rel_end_us.first() / 1000.0; in ColumnString()
73 const double avg_time_ms = detail.rel_end_us.avg() / 1000.0; in ColumnString()
74 const double percentage = detail.rel_end_us.sum() * 100.0 / stat.sum(); in ColumnString()
76 const int64_t times_called = detail.times_called / num_runs(); in ColumnString()
79 InitField(stream, 24) << detail.type; in ColumnString()
85 InitField(stream, 10) << detail.mem_used.newest() / 1000.0; in ColumnString()
87 stream << "\t" << detail.name; in ColumnString()
98 const Detail* detail = &(det.second); in OrderNodesByMetric() local
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Dstats_calculator_test.cc52 const Detail& detail = calc.GetDetails().at("node1"); in TEST() local
53 EXPECT_EQ(1, detail.times_called); in TEST()
54 EXPECT_EQ("node1", detail.name); in TEST()
55 EXPECT_EQ("type_1", detail.type); in TEST()
56 EXPECT_EQ(node1_run_order, detail.run_order); in TEST()
65 EXPECT_EQ(2, detail.times_called); in TEST()
66 EXPECT_EQ("node1", detail.name); in TEST()
67 EXPECT_EQ("type_1", detail.type); in TEST()
68 EXPECT_EQ(node1_run_order, detail.run_order); in TEST()
70 EXPECT_EQ(run1_start_us + run2_start_us, detail.start_us.sum()); in TEST()
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/external/capstone/arch/Mips/
DMipsInstPrinter.c92 if (MI->csh->detail != CS_OPT_ON) in set_mem_access()
96 MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].type = MIPS_OP_MEM; in set_mem_access()
97 …MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].mem.base = MIPS_REG_INV… in set_mem_access()
98 MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].mem.disp = 0; in set_mem_access()
101 MI->flat_insn->detail->mips.op_count++; in set_mem_access()
196 if (MI->csh->detail) { in printOperand()
198 MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].mem.base = reg; in printOperand()
200 MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].type = MIPS_OP_REG; in printOperand()
201 MI->flat_insn->detail->mips.operands[MI->flat_insn->detail->mips.op_count].reg = reg; in printOperand()
202 MI->flat_insn->detail->mips.op_count++; in printOperand()
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/external/parameter-framework/asio-1.10.6/include/asio/
Dsocket_base.hpp76 typedef asio::detail::socket_option::boolean<
106 typedef asio::detail::socket_option::boolean<
135 typedef asio::detail::socket_option::boolean<
165 typedef asio::detail::socket_option::boolean<
194 typedef asio::detail::socket_option::integer<
224 typedef asio::detail::socket_option::integer<
254 typedef asio::detail::socket_option::integer<
284 typedef asio::detail::socket_option::integer<
315 typedef asio::detail::socket_option::boolean<
347 typedef asio::detail::socket_option::linger<
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/external/capstone/
Dcs.c258 ud->detail = CS_OPT_OFF; in cs_open()
417 handle->detail = (cs_opt_value)value; in cs_option()
531 if (handle->detail) { in cs_disasm()
533 insn_cache->detail = cs_mem_malloc(sizeof(cs_detail)); in cs_disasm()
535 insn_cache->detail = NULL; in cs_disasm()
567 if (handle->detail) { in cs_disasm()
568 cs_mem_free(insn_cache->detail); in cs_disasm()
602 insn_cache->detail = NULL; in cs_disasm()
622 if (handle->detail) { in cs_disasm()
625 cs_mem_free(insn_cache->detail); in cs_disasm()
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Support/
DEndian.h35 namespace detail {
71 memory, (detail::PickAlignment<value_type, alignment>::value)), in read()
103 memory, (detail::PickAlignment<value_type, alignment>::value)), in write()
129 memory, (detail::PickAlignment<value_type, alignment>::value)), in readAtBitAlignment()
164 memory, (detail::PickAlignment<value_type, alignment>::value)), in writeAtBitAlignment()
198 memory, (detail::PickAlignment<value_type, alignment>::value)), in writeAtBitAlignment()
205 namespace detail {
269 detail::packed_endian_specific_integral<uint16_t, little, unaligned>;
271 detail::packed_endian_specific_integral<uint32_t, little, unaligned>;
273 detail::packed_endian_specific_integral<uint64_t, little, unaligned>;
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/external/parameter-framework/asio-1.10.6/include/asio/ip/detail/impl/
Dendpoint.ipp2 // ip/detail/impl/endpoint.ipp
15 #include "asio/detail/config.hpp"
17 #include "asio/detail/socket_ops.hpp"
18 #include "asio/detail/throw_error.hpp"
20 #include "asio/ip/detail/endpoint.hpp"
22 #include "asio/detail/push_options.hpp"
26 namespace detail {
44 asio::detail::socket_ops::host_to_network_short(port_num);
51 asio::detail::socket_ops::host_to_network_short(port_num);
74 asio::detail::socket_ops::host_to_network_short(port_num);
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/external/swiftshader/third_party/llvm-7.0/llvm/unittests/Support/
DHost.cpp83 EXPECT_EQ(sys::detail::getHostCPUNameForARM(CortexA9ProcCpuinfo), in TEST()
85 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n" in TEST()
89 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x40\n" in TEST()
92 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n" in TEST()
98 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n" in TEST()
102 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x40\n" in TEST()
105 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n" in TEST()
108 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n" in TEST()
111 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n" in TEST()
114 EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n" in TEST()
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/external/mesa3d/include/CL/
Dcl.hpp685 namespace detail { namespace
761 namespace detail { \
938 struct param_traits<detail:: token,param_name> \
1183 class Device : public detail::Wrapper<cl_device_id>
1188 Device() : detail::Wrapper<cl_type>() { } in Device()
1190 Device(const Device& device) : detail::Wrapper<cl_type>(device) { } in Device()
1195 detail::Wrapper<cl_type>::operator=(rhs); in operator =()
1203 return detail::errHandler( in getInfo()
1204 detail::getInfo(&::clGetDeviceInfo, object_, name, param), in getInfo()
1209 detail::param_traits<detail::cl_device_info, name>::param_type
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12345678910>>...51