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Searched refs:devdisr (Results 1 – 22 of 22) sorted by relevance

/external/u-boot/arch/powerpc/cpu/mpc85xx/
Dmp.c104 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_CPU0); in cpu_disable()
107 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_CPU1); in cpu_disable()
119 u32 devdisr = in_be32(&gur->devdisr); in is_core_disabled() local
123 return (devdisr & MPC85xx_DEVDISR_CPU0); in is_core_disabled()
125 return (devdisr & MPC85xx_DEVDISR_CPU1); in is_core_disabled()
336 u32 devdisr; in plat_mp_up() local
343 devdisr = in_be32(&gur->devdisr); in plat_mp_up()
345 devdisr |= MPC85xx_DEVDISR_TB0; in plat_mp_up()
347 devdisr |= MPC85xx_DEVDISR_TB1; in plat_mp_up()
348 out_be32(&gur->devdisr, devdisr); in plat_mp_up()
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Dfsl_corenet_serdes.c343 u32 devdisr, u32 devdisr2, int cfg) in p4080_erratum_serdes8() argument
356 clrbits_be32(&gur->devdisr, devdisr); in p4080_erratum_serdes8()
Dcpu.c433 setbits_be32(&gur->devdisr, 0x00010000); in dram_init()
436 clrbits_be32(&gur->devdisr, 0x00010000); in dram_init()
/external/u-boot/board/freescale/mpc8544ds/
Dmpc8544ds.c67 u32 devdisr, pordevsr, io_sel; in pci_init_board() local
73 devdisr = in_be32(&gur->devdisr); in pci_init_board()
78 debug (" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel); in pci_init_board()
85 if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE3)){ in pci_init_board()
117 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE3); /* disable */ in pci_init_board()
122 first_free_busno = fsl_pcie_init_ctrl(first_free_busno, devdisr, PCIE1, &pci_info); in pci_init_board()
124 setbits_be32(&gur->devdisr, _DEVDISR_PCIE1); /* disable */ in pci_init_board()
129 first_free_busno = fsl_pcie_init_ctrl(first_free_busno, devdisr, PCIE2, &pci_info); in pci_init_board()
131 setbits_be32(&gur->devdisr, _DEVDISR_PCIE2); /* disable */ in pci_init_board()
140 if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { in pci_init_board()
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/external/u-boot/arch/powerpc/cpu/mpc86xx/
Dmp.c39 setbits_be32(&gur->devdisr, MPC86xx_DEVDISR_CPU0); in cpu_disable()
42 setbits_be32(&gur->devdisr, MPC86xx_DEVDISR_CPU1); in cpu_disable()
55 u32 devdisr = in_be32(&gur->devdisr); in is_core_disabled() local
59 return (devdisr & MPC86xx_DEVDISR_CPU0); in is_core_disabled()
61 return (devdisr & MPC86xx_DEVDISR_CPU1); in is_core_disabled()
/external/u-boot/drivers/net/fm/
Dp1023.c20 u32 devdisr = in_be32(&gur->devdisr); in is_device_disabled() local
22 return port_to_devdisr[port] & devdisr; in is_device_disabled()
33 setbits_be32(&gur->devdisr, port_to_devdisr[port]); in fman_disable_port()
40 clrbits_be32(&gur->devdisr, port_to_devdisr[port]); in fman_enable_port()
/external/u-boot/arch/powerpc/cpu/mpc8xxx/
Dsrio.c232 u32 *devdisr; in srio_init() local
235 devdisr = &gur->devdisr3; in srio_init()
237 devdisr = &gur->devdisr; in srio_init()
275 setbits_be32(devdisr, _DEVDISR_SRIO1); in srio_init()
277 setbits_be32(devdisr, _DEVDISR_SRIO2); in srio_init()
282 setbits_be32(devdisr, _DEVDISR_SRIO1); in srio_init()
283 setbits_be32(devdisr, _DEVDISR_SRIO2); in srio_init()
284 setbits_be32(devdisr, _DEVDISR_RMU); in srio_init()
/external/u-boot/board/freescale/mpc8568mds/
Dmpc8568mds.c296 u32 devdisr, pordevsr, io_sel; in pci_init_board() local
299 devdisr = in_be32(&gur->devdisr); in pci_init_board()
304 debug (" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel); in pci_init_board()
311 if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { in pci_init_board()
339 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); /* disable */ in pci_init_board()
/external/u-boot/board/freescale/mpc8548cds/
Dmpc8548cds.c196 u32 devdisr, pordevsr, io_sel; in pci_init_board() local
201 devdisr = in_be32(&gur->devdisr); in pci_init_board()
206 debug (" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel); in pci_init_board()
214 if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { in pci_init_board()
251 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); /* disable */ in pci_init_board()
266 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI2); /* disable */ in pci_init_board()
/external/u-boot/board/xes/common/
Dfsl_8xxx_pci.c29 u32 devdisr = in_be32(&gur->devdisr); in pci_init_board() local
36 if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { in pci_init_board()
60 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); in pci_init_board()
/external/u-boot/board/sbc8548/
Dsbc8548.c248 u32 devdisr = in_be32(&gur->devdisr); in pci_init_board() local
252 if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { in pci_init_board()
279 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); /* disable */ in pci_init_board()
282 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI2); /* disable PCI2 */ in pci_init_board()
/external/u-boot/board/freescale/mpc8610hpcd/
Dmpc8610hpcd.c224 u32 devdisr; in pci_init_board() local
228 devdisr = in_be32(&gur->devdisr); in pci_init_board()
233 if (!(devdisr & MPC86xx_DEVDISR_PCI1)) { in pci_init_board()
256 setbits_be32(&gur->devdisr, MPC86xx_DEVDISR_PCI1); /* disable */ in pci_init_board()
/external/u-boot/board/freescale/mpc8536ds/
Dmpc8536ds.c149 u32 devdisr, pordevsr; in pci_init_board() local
156 devdisr = in_be32(&gur->devdisr); in pci_init_board()
165 if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { in pci_init_board()
190 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); /* disable */ in pci_init_board()
/external/u-boot/drivers/pci/
Dfsl_pci_init.c810 int fsl_pcie_init_ctrl(int busno, u32 devdisr, enum srds_prtcl dev, in fsl_pcie_init_ctrl() argument
820 if (is_serdes_configured(dev) && !(devdisr & devdisr_mask[num])) { in fsl_pcie_init_ctrl()
834 u32 devdisr; in fsl_pcie_init_board() local
840 addr = &gur->devdisr; in fsl_pcie_init_board()
842 devdisr = in_be32(addr); in fsl_pcie_init_board()
846 busno = fsl_pcie_init_ctrl(busno, devdisr, PCIE1, &pci_info); in fsl_pcie_init_board()
853 busno = fsl_pcie_init_ctrl(busno, devdisr, PCIE2, &pci_info); in fsl_pcie_init_board()
860 busno = fsl_pcie_init_ctrl(busno, devdisr, PCIE3, &pci_info); in fsl_pcie_init_board()
867 busno = fsl_pcie_init_ctrl(busno, devdisr, PCIE4, &pci_info); in fsl_pcie_init_board()
875 int fsl_pcie_init_ctrl(int busno, u32 devdisr, enum srds_prtcl dev, in fsl_pcie_init_ctrl() argument
/external/u-boot/drivers/misc/
Dfsl_devdis.c24 setbits_be32(&gur->devdisr + tbl[i].offset, in device_disable()
/external/u-boot/drivers/qe/
Dqe.c408 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_QE_DISABLE); in qe_upload_firmware()
547 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_QE_DISABLE); in u_qe_upload_firmware()
655 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_QE_DISABLE); in u_qe_firmware_resume()
/external/u-boot/arch/powerpc/include/asm/
Dfsl_pci.h190 int fsl_pcie_init_ctrl(int busno, u32 devdisr, enum srds_prtcl dev,
Dimmap_86xx.h1091 uint devdisr; /* 0xe0070 - Device disable control */ member
Dimmap_85xx.h1604 u32 devdisr; /* Device disable control */ member
2449 u32 devdisr; /* Device disable control */ member
/external/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
Dimmap_lsch3.h214 u32 devdisr; /* Device disable control 1 */ member
Dimmap_lsch2.h223 u32 devdisr; /* Device disable control */ member
/external/u-boot/arch/arm/include/asm/arch-ls102xa/
Dimmap_ls102xa.h98 u32 devdisr; /* Device disable control */ member