Searched refs:dimm (Results 1 – 12 of 12) sorted by relevance
/external/u-boot/doc/device-tree-bindings/misc/ |
D | intel,baytrail-fsp.txt | 70 - fsp,dimm-0-enable 71 - fsp,dimm-1-enable 77 - fsp,dimm-width 78 - fsp,dimm-density 79 - fsp,dimm-bus-width 80 - fsp,dimm-sides 81 - fsp,dimm-tcl 82 - fsp,dimm-trpt-rcd 83 - fsp,dimm-twr 84 - fsp,dimm-twtr [all …]
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/external/autotest/client/site_tests/platform_MemCheck/ |
D | platform_MemCheck.py | 96 for dimm, line in enumerate(timing_run.stdout.split('\n')): 100 keyval['timing_dimm_%d' % dimm] = max_timing 104 dimm, max_timing) 107 logging.info('dimm #%d timings: %s', dimm, max_timing) 109 keyval['speed_dimm_%d' % dimm] = max_speed 113 error_list += ['speed_dimm_%d' % dimm] 122 for dimm, line in enumerate(mem_ids): 125 keyval['memory_id_dimm_%d' % dimm] = line
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/external/u-boot/arch/x86/dts/ |
D | conga-qeval20-qa3-e3845.dts | 282 fsp,dimm-0-enable; 283 fsp,dimm-1-enable; 284 fsp,dimm-width = <DIMM_WIDTH_X16>; 285 fsp,dimm-density = <DIMM_DENSITY_4GBIT>; 286 fsp,dimm-bus-width = <DIMM_BUS_WIDTH_64BITS>; 287 fsp,dimm-sides = <DIMM_SIDES_1RANKS>; 290 fsp,dimm-tcl = <8>; 291 fsp,dimm-trpt-rcd = <8>; 292 fsp,dimm-twr = <8>; 293 fsp,dimm-twtr = <4>; [all …]
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D | dfi-bt700.dtsi | 301 fsp,dimm-0-enable; 302 fsp,dimm-width = <DIMM_WIDTH_X16>; 303 fsp,dimm-density = <DIMM_DENSITY_8GBIT>; 304 fsp,dimm-bus-width = <DIMM_BUS_WIDTH_64BITS>; 305 fsp,dimm-sides = <DIMM_SIDES_1RANKS>; 308 fsp,dimm-tcl = <8>; 309 fsp,dimm-trpt-rcd = <8>; 310 fsp,dimm-twr = <8>; 311 fsp,dimm-twtr = <4>; 312 fsp,dimm-trrd = <6>; [all …]
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D | minnowmax.dts | 303 fsp,dimm-0-enable; 304 fsp,dimm-width = <DIMM_WIDTH_X16>; 305 fsp,dimm-density = <DIMM_DENSITY_4GBIT>; 306 fsp,dimm-bus-width = <DIMM_BUS_WIDTH_64BITS>; 307 fsp,dimm-sides = <DIMM_SIDES_1RANKS>; 308 fsp,dimm-tcl = <0xb>; 309 fsp,dimm-trpt-rcd = <0xb>; 310 fsp,dimm-twr = <0xc>; 311 fsp,dimm-twtr = <6>; 312 fsp,dimm-trrd = <6>; [all …]
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/external/u-boot/drivers/ddr/marvell/axp/ |
D | ddr3_spd.c | 183 u32 dimm); 506 int ddr3_spd_sum_init(MV_DIMM_INFO *info, MV_DIMM_INFO *sum_info, u32 dimm) in ddr3_spd_sum_init() argument 508 if (dimm == 0) { in ddr3_spd_sum_init() 585 __maybe_unused u32 dimm_cnt, cs_count, dimm; local 625 for (dimm = 0; dimm < dimm_num; dimm++) { 626 status = ddr3_spd_init(&dimm_info[dimm], dimm_addr[dimm], 630 status = ddr3_spd_sum_init(&dimm_info[dimm], &sum_info, dimm); 643 for (dimm = 0; dimm < dimm_num; dimm++) 644 cs_num += dimm_info[dimm].num_of_module_ranks; 658 dimm = 0; [all …]
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/external/u-boot/drivers/ddr/fsl/ |
D | options.c | 1325 struct dimm_params_s *dimm; in check_interleaving_options() local 1341 dimm = &pinfo->dimm_params[i][0]; in check_interleaving_options() 1344 } else if (((check_rank_density != dimm->rank_density) || in check_interleaving_options() 1345 (check_n_ranks != dimm->n_ranks) || in check_interleaving_options() 1346 (check_n_row_addr != dimm->n_row_addr) || in check_interleaving_options() 1347 (check_n_col_addr != dimm->n_col_addr) || in check_interleaving_options()
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D | interactive.c | 1811 #define DATA_OPTIONS(name, step, dimm) {#name, step, dimm} argument
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/external/clang/test/CodeGenCXX/ |
D | pr12104.h | 1 template <int dimm> struct Patch {
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/external/u-boot/arch/x86/include/asm/ |
D | global_data.h | 41 struct dimm_info dimm[8]; member
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/external/mp4parser/isoparser/src/main/resources/ |
D | isoparser-default.properties | 225 #hinf-dimm=com.coremedia.iso.boxes.rtp.HintStatisticBoxes(type)
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/external/u-boot/doc/ |
D | README.fsl-ddr | 295 type command "copy" with arguments to copy controller/dimm settings
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