Searched refs:disp_ctrl (Results 1 – 3 of 3) sorted by relevance
/external/u-boot/drivers/video/tegra124/ |
D | display.c | 52 static int update_display_mode(struct dc_ctlr *disp_ctrl, in update_display_mode() argument 58 writel(0x1, &disp_ctrl->disp.disp_timing_opt); in update_display_mode() 61 &disp_ctrl->disp.ref_to_sync); in update_display_mode() 64 &disp_ctrl->disp.sync_width); in update_display_mode() 67 timing->hback_porch.typ, &disp_ctrl->disp.back_porch); in update_display_mode() 70 timing->hfront_porch.typ, &disp_ctrl->disp.front_porch); in update_display_mode() 73 &disp_ctrl->disp.disp_active); in update_display_mode() 90 &disp_ctrl->disp.disp_clk_ctrl); in update_display_mode() 117 int tegra_dc_sor_general_act(struct dc_ctlr *disp_ctrl) in tegra_dc_sor_general_act() argument 119 writel(GENERAL_ACT_REQ, &disp_ctrl->cmd.state_ctrl); in tegra_dc_sor_general_act() [all …]
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D | sor.c | 676 static void tegra_dc_sor_enable_dc(struct dc_ctlr *disp_ctrl) in tegra_dc_sor_enable_dc() argument 678 u32 reg_val = readl(&disp_ctrl->cmd.state_access); in tegra_dc_sor_enable_dc() 680 writel(reg_val | WRITE_MUX_ACTIVE, &disp_ctrl->cmd.state_access); in tegra_dc_sor_enable_dc() 681 writel(VSYNC_H_POSITION(1), &disp_ctrl->disp.disp_timing_opt); in tegra_dc_sor_enable_dc() 685 &disp_ctrl->cmd.disp_cmd); in tegra_dc_sor_enable_dc() 686 writel(reg_val, &disp_ctrl->cmd.state_access); in tegra_dc_sor_enable_dc() 759 struct dc_ctlr *disp_ctrl; in tegra_dc_sor_attach() local 764 disp_ctrl = (struct dc_ctlr *)dev_read_addr(dc_dev); in tegra_dc_sor_attach() 766 tegra_dc_sor_enable_dc(disp_ctrl); in tegra_dc_sor_attach() 769 writel(0x9f00, &disp_ctrl->cmd.state_ctrl); in tegra_dc_sor_attach() [all …]
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D | sor.h | 907 void tegra_dc_sor_disable_win_short_raster(struct dc_ctlr *disp_ctrl, 909 int tegra_dc_sor_general_act(struct dc_ctlr *disp_ctrl); 910 void tegra_dc_sor_restore_win_and_raster(struct dc_ctlr *disp_ctrl,
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