| /external/u-boot/arch/sh/lib/ |
| D | udivsi3.S | 15 div1 r5,r4
17 div1 r5,r4; div1 r5,r4; div1 r5,r4
18 div1 r5,r4; div1 r5,r4; div1 r5,r4; rts; div1 r5,r4
21 div1 r5,r4; rotcl r0
22 div1 r5,r4; rotcl r0
23 div1 r5,r4; rotcl r0
24 rts; div1 r5,r4
37 div1 r5,r4
43 div1 r5,r4
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| D | udivsi3_i4i-Os.S | 38 div1 r5,r4
40 div1 r5,r4
41 div1 r5,r4
43 div1 r5,r4
48 div1 r5,r4
50 div1 r5,r4
58 div1 r5,r4
60 div1 r5,r4; div1 r5,r4; div1 r5,r4
61 div1 r5,r4; div1 r5,r4; rts; div1 r5,r4
65 div1 r5,r4
[all …]
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| D | udivsi3_i4i.S | 54 div1 r5,r0
56 div1 r5,r0
57 div1 r5,r0
59 div1 r5,r0
101 div1 r5,r0
108 div1 r5,r0
111 div1 r5,r0
114 div1 r5,r0
117 div1 r5,r0
119 div1 r5,r0
[all …]
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| /external/llvm/test/Transforms/InstCombine/ |
| D | 2012-08-28-udiv_ashl.ll | 14 %div1 = udiv i32 %div, 100
15 ret i32 %div1
26 %div1 = udiv i32 %div, 100
27 ret i32 %div1
39 %div1 = sdiv i32 %div, 100
40 ret i32 %div1
49 %div1 = udiv i80 %div, 100
50 ret i80 %div1
55 %div1 = udiv i32 %div, 100
56 ret i32 %div1
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| D | fdiv.ll | 36 %div1 = fdiv fast float %x, %y
37 %div2 = fdiv fast float %div1, %z
45 %div1 = fdiv fast float %x, %y
46 %div2 = fdiv fast float %z, %div1
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/ |
| D | 2012-08-28-udiv_ashl.ll | 14 %div1 = udiv i32 %div, 100
15 ret i32 %div1
26 %div1 = udiv i32 %div, 100
27 ret i32 %div1
39 %div1 = sdiv i32 %div, 100
40 ret i32 %div1
49 %div1 = udiv i80 %div, 100
50 ret i80 %div1
55 %div1 = udiv i32 %div, 100
56 ret i32 %div1
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| D | fdiv.ll | 142 %div1 = fdiv ninf float %x, %y
143 %div2 = fdiv arcp reassoc float %div1, %z
155 %div1 = fdiv nnan <2 x float> %x, %y
156 %div2 = fdiv arcp reassoc <2 x float> %z, %div1
171 %div1 = fdiv float %x, %y
172 %div2 = fdiv fast float %div1, %z
173 call void @use_f32(float %div1)
184 %div1 = fdiv float %x, %y
185 %div2 = fdiv fast float %z, %div1
186 call void @use_f32(float %div1)
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| D | select-crash.ll | 11 %div1 = fdiv double 1.000000e+00, %add
12 %sub = fsub double 1.075000e+00, %div1
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| /external/llvm/test/CodeGen/AArch64/ |
| D | fdiv-combine.ll | 15 %div1 = fdiv float %b, %D
17 tail call void @foo_3f(float %div, float %div1, float %div2)
29 %div1 = fdiv double %b, %D
31 tail call void @foo_3d(double %div, double %div1, double %div2)
43 %div1 = fdiv <4 x float> %b, %D
45 tail call void @foo_3_4xf(<4 x float> %div, <4 x float> %div1, <4 x float> %div2)
57 %div1 = fdiv <2 x double> %b, %D
59 tail call void @foo_3_2xd(<2 x double> %div, <2 x double> %div1, <2 x double> %div2)
71 %div1 = fdiv float %b, %D
72 tail call void @foo_2f(float %div, float %div1)
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | fdiv-combine.ll | 15 %div1 = fdiv float %b, %D
17 tail call void @foo_3f(float %div, float %div1, float %div2)
29 %div1 = fdiv double %b, %D
31 tail call void @foo_3d(double %div, double %div1, double %div2)
43 %div1 = fdiv <4 x float> %b, %D
45 tail call void @foo_3_4xf(<4 x float> %div, <4 x float> %div1, <4 x float> %div2)
57 %div1 = fdiv <2 x double> %b, %D
59 tail call void @foo_3_2xd(<2 x double> %div, <2 x double> %div1, <2 x double> %div2)
71 %div1 = fdiv float %b, %D
72 tail call void @foo_2f(float %div, float %div1)
[all …]
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| /external/llvm/test/CodeGen/X86/ |
| D | fdiv-combine.ll | 13 %div1 = fdiv arcp float %x, %y
14 ret float %div1
28 %div1 = fdiv arcp float %x, %z
29 %mul = fmul arcp float %div1, %y
43 %div1 = fdiv float %x, %z
44 %mul = fmul arcp float %div1, %y
58 %div1 = fdiv arcp float %x, %z
59 %mul = fmul arcp float %div1, %y
75 %div1 = fdiv arcp float %x, %z
76 %mul = fmul float %div1, %y
[all …]
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| /external/u-boot/drivers/clk/ |
| D | clk_zynq.c | 227 u32 clk_ctrl, div0, div1; in zynq_clk_get_dci_rate() local
232 div1 = (clk_ctrl & CLK_CTRL_DIV1_MASK) >> CLK_CTRL_DIV1_SHIFT; in zynq_clk_get_dci_rate()
235 zynq_clk_get_pll_rate(priv, ddrpll_clk), div0), div1); in zynq_clk_get_dci_rate()
244 u32 div1 = 1; in zynq_clk_get_peripheral_rate() local
254 div1 = (clk_ctrl & CLK_CTRL_DIV1_MASK) >> CLK_CTRL_DIV1_SHIFT; in zynq_clk_get_peripheral_rate()
255 if (!div1) in zynq_clk_get_peripheral_rate()
256 div1 = 1; in zynq_clk_get_peripheral_rate()
266 div1); in zynq_clk_get_peripheral_rate()
289 u32 *div0, u32 *div1) in zynq_clk_calc_peripheral_two_divs() argument
303 *div1 = d1; in zynq_clk_calc_peripheral_two_divs()
[all …]
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| D | clk_zynqmp.c | 418 u32 div1 = 1; in zynqmp_clk_get_peripheral_rate() local
433 div1 = (clk_ctrl & CLK_CTRL_DIV1_MASK) >> CLK_CTRL_DIV1_SHIFT; in zynqmp_clk_get_peripheral_rate()
434 if (!div1) in zynqmp_clk_get_peripheral_rate()
435 div1 = 1; in zynqmp_clk_get_peripheral_rate()
445 DIV_ROUND_CLOSEST(pllrate, div0), div1); in zynqmp_clk_get_peripheral_rate()
453 u32 div1 = 1; in zynqmp_clk_get_wdt_rate() local
474 div1 = (clk_ctrl & CLK_CTRL_DIV0_MASK) >> CLK_CTRL_DIV0_SHIFT; in zynqmp_clk_get_wdt_rate()
475 if (!div1) in zynqmp_clk_get_wdt_rate()
476 div1 = 1; in zynqmp_clk_get_wdt_rate()
488 DIV_ROUND_CLOSEST(pllrate, div0), div1); in zynqmp_clk_get_wdt_rate()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
| D | fdiv-combine.ll | 13 %div1 = fdiv arcp float %x, %y
14 ret float %div1
28 %div1 = fdiv arcp float %x, %z
29 %mul = fmul arcp float %div1, %y
43 %div1 = fdiv float %x, %z
44 %mul = fmul arcp float %div1, %y
58 %div1 = fdiv arcp float %x, %z
59 %mul = fmul arcp float %div1, %y
75 %div1 = fdiv arcp float %x, %z
76 %mul = fmul float %div1, %y
[all …]
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| /external/llvm/test/CodeGen/PowerPC/ |
| D | fdiv-combine.ll | 18 %div1 = fdiv double %b, %D
20 tail call void @foo_3d(double %div, double %div1, double %div2)
30 %div1 = fdiv double %b, %D
31 tail call void @foo_2d(double %div, double %div1)
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
| D | fdiv-combine.ll | 18 %div1 = fdiv double %b, %D
20 tail call void @foo_3d(double %div, double %div1, double %div2)
30 %div1 = fdiv double %b, %D
31 tail call void @foo_2d(double %div, double %div1)
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| /external/u-boot/arch/arm/mach-sunxi/ |
| D | clock_sun8i_a83t.c | 111 unsigned int div1 = 0, div2 = 0; in clock_set_pll5() local
117 div1 << CCM_PLL5_DIV1_SHIFT, &ccm->pll5_cfg); in clock_set_pll5()
130 int div1 = ((rval & CCM_PLL6_CTRL_DIV1_MASK) >> in clock_get_pll6() local
134 return 24000000 * n / div1 / div2; in clock_get_pll6()
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| /external/llvm/test/Transforms/CodeGenPrepare/X86/ |
| D | select.ll | 62 %div1 = fdiv float %a, %b
65 %sel = select i1 %cmp, float %div1, float %div2
72 ; CHECK: %div1 = fdiv float %a, %b
78 ; CHECK: %sel = phi float [ %div1, %select.true.sink ], [ %div2, %select.false.sink ]
146 %div1 = sdiv i32 %a, %b
149 %sel = select i1 %cmp, i32 %div1, i32 %div2
153 ; CHECK: %sel = select i1 %cmp, i32 %div1, i32 %div2
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
| D | lds-oqap-crash.ll | 19 %div1 = udiv i32 %div0, %a
20 %div2 = udiv i32 %div1, 11
25 %div7 = udiv i32 %div6, %div1
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| D | structurize.ll | 70 %div1 = udiv i32 %div0, %4
71 %div2 = udiv i32 %div1, 11
76 %div7 = udiv i32 %div6, %div1
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| /external/llvm/test/CodeGen/AMDGPU/ |
| D | lds-oqap-crash.ll | 19 %div1 = udiv i32 %div0, %a
20 %div2 = udiv i32 %div1, 11
25 %div7 = udiv i32 %div6, %div1
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| D | structurize.ll | 70 %div1 = udiv i32 %div0, %4
71 %div2 = udiv i32 %div1, 11
76 %div7 = udiv i32 %div6, %div1
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| /external/u-boot/arch/arm/mach-s5pc1xx/include/mach/ |
| D | clock.h | 29 unsigned int div1; member
65 unsigned int div1; member
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| /external/u-boot/board/samsung/smdkc100/ |
| D | onenand.c | 40 value = readl(&clk->div1); in onenand_board_init()
43 writel(value, &clk->div1); in onenand_board_init()
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| /external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/ |
| D | select-crash.ll | 11 %div1 = fdiv double 1.000000e+00, %add
12 %sub = fsub double 1.075000e+00, %div1
|