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Searched refs:div11 (Results 1 – 14 of 14) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopUnroll/
Dhigh-cost-trip-count-computation.ll43 %div11 = udiv i64 %ExpensiveComputation, %conv7
44 %cmp.i38 = icmp ugt i64 %div11, 1
45 %div12 = select i1 %cmp.i38, i64 %div11, i64 1
/external/llvm/test/Transforms/LoopUnroll/
Dhigh-cost-trip-count-computation.ll43 %div11 = udiv i64 %ExpensiveComputation, %conv7
44 %cmp.i38 = icmp ugt i64 %div11, 1
45 %div12 = select i1 %cmp.i38, i64 %div11, i64 1
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dppc64-r2-alloc.ll18 %div11 = sdiv i32 %div10, %d
19 %div12 = sdiv i32 %div11, %d
60 %div53 = sdiv i32 %div52, %div11
/external/llvm/test/CodeGen/PowerPC/
Dppc64-r2-alloc.ll18 %div11 = sdiv i32 %div10, %d
19 %div12 = sdiv i32 %div11, %d
60 %div53 = sdiv i32 %div52, %div11
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
D2010-05-03-CoalescerSubRegClobber.ll21 %div11 = udiv i32 %to, %x.0.lcssa ; <i32> [#uses=1]
23 %conv14 = zext i32 %div11 to i64 ; <i64> [#uses=1]
/external/llvm/test/CodeGen/X86/
D2010-05-03-CoalescerSubRegClobber.ll21 %div11 = udiv i32 %to, %x.0.lcssa ; <i32> [#uses=1]
23 %conv14 = zext i32 %div11 to i64 ; <i64> [#uses=1]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SLPVectorizer/AArch64/
Dsdiv-pow2.ll30 %div11 = sdiv i32 %add10, 2
32 store i32 %div11, i32* %arrayidx12, align 4
/external/llvm/test/Transforms/SLPVectorizer/AArch64/
Dsdiv-pow2.ll30 %div11 = sdiv i32 %add10, 2
32 store i32 %div11, i32* %arrayidx12, align 4
/external/llvm/test/Transforms/SLPVectorizer/X86/
Dpowof2div.ll30 %div11 = sdiv i32 %add10, 2
32 store i32 %div11, i32* %arrayidx12, align 4
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
D2010-05-03-CoalescerSubRegClobber.ll21 %div11 = udiv i32 %to, %x.0.lcssa ; <i32> [#uses=1]
23 %conv14 = zext i32 %div11 to i64 ; <i64> [#uses=1]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SLPVectorizer/X86/
Dpowof2div.ll46 %div11 = sdiv i32 %add10, 2
48 store i32 %div11, i32* %arrayidx12, align 4
134 %div11 = sdiv i32 %add10, 8
136 store i32 %div11, i32* %arrayidx12, align 4
/external/u-boot/arch/arm/mach-keystone/include/mach/
Dclock_defs.h45 u32 div11; /* 7c */ member
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/WebAssembly/
Dreg-stackify.ll216 %div11 = sdiv i32 %o, %p
217 %div12 = sdiv i32 %div10, %div11
/external/llvm/test/CodeGen/WebAssembly/
Dreg-stackify.ll217 %div11 = sdiv i32 %o, %p
218 %div12 = sdiv i32 %div10, %div11