/external/u-boot/arch/x86/cpu/broadwell/ |
D | sata.c | 62 dm_pci_read_config32(dev, 0x98, ®32); in broadwell_sata_init() 80 dm_pci_read_config32(dev, PCI_BASE_ADDRESS_5, ®32); in broadwell_sata_init() 195 dm_pci_read_config32(dev, 0x300, ®32); in broadwell_sata_init() 200 dm_pci_read_config32(dev, 0x98, ®32); in broadwell_sata_init() 205 dm_pci_read_config32(dev, 0x9c, ®32); in broadwell_sata_init()
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D | me.c | 16 dm_pci_read_config32(dev, offset, &dword); in me_read_dword_ptr() 44 dm_pci_read_config32(dev, PCI_ME_HFS5, &hsiover); in intel_me_hsio_version()
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D | pch.c | 502 dm_pci_read_config32(dev, PCH_RCBA, &rcba); in broadwell_pch_get_spi_base() 517 dm_pci_read_config32(dev, GPIO_BASE, gbasep); in broadwell_get_gpio_base()
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D | sdram.c | 139 dm_pci_read_config32(dev, DPR, &dpr); in get_top_of_ram()
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/external/u-boot/arch/x86/cpu/ivybridge/ |
D | sdram.c | 266 dm_pci_read_config32(dev, TOUUD + 4, &val); in sdram_find() 268 dm_pci_read_config32(dev, TOUUD, &val); in sdram_find() 272 dm_pci_read_config32(dev, TOLUD, &tolud); in sdram_find() 275 dm_pci_read_config32(dev, 0xa4, &val); in sdram_find() 277 dm_pci_read_config32(dev, 0xa0, &val); in sdram_find() 283 dm_pci_read_config32(dev, 0x74, &val); in sdram_find() 285 dm_pci_read_config32(dev, 0x70, &val); in sdram_find() 321 dm_pci_read_config32(dev, 0xb8, &tseg_base); in sdram_find()
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D | early_me.c | 79 dm_pci_read_config32(dev, ETR3, &etr3); in set_global_reset() 105 dm_pci_read_config32(PCH_DEV, PCI_CPU_MEBASE_L, &mebase_l); in intel_early_me_init_done() 106 dm_pci_read_config32(PCH_DEV, PCI_CPU_MEBASE_H, &mebase_h); in intel_early_me_init_done()
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D | bd82x6x.c | 171 dm_pci_read_config32(dev, PCH_RCBA, &rcba); in bd82x6x_pch_get_spi_base() 198 dm_pci_read_config32(dev, GPIO_BASE, &base); in bd82x6x_get_gpio_base()
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D | northbridge.c | 43 dm_pci_read_config32(dev, PCIEXBAR, &pciexbar_reg); in get_pcie_bar() 187 dm_pci_read_config32(dev, 0xe4, &capid0_a); in bd82x6x_northbridge_early_init()
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/external/u-boot/drivers/pch/ |
D | pch9.c | 18 dm_pci_read_config32(dev, SBASE_ADDR, &sbase_addr); in pch9_get_spi_base() 38 dm_pci_read_config32(dev, GPIO_BASE, &base); in pch9_get_gpio_base() 59 dm_pci_read_config32(dev, IO_BASE, &base); in pch9_get_io_base()
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D | pch7.c | 17 dm_pci_read_config32(dev, PCH_RCBA, &rcba); in pch7_get_spi_base() 54 dm_pci_read_config32(dev, GPIO_BASE, &base); in pch7_get_gpio_base()
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/external/u-boot/drivers/bios_emulator/ |
D | atibios.c | 311 dm_pci_read_config32(pcidev, *bar, &base); in PCI_findBIOSAddr() 318 dm_pci_read_config32(pcidev, *bar, &size); in PCI_findBIOSAddr() 384 dm_pci_read_config32(pcidev, PCI_ROM_ADDRESS, &saveROMBaseAddress); in PCI_mapBIOSImage() 385 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10); in PCI_mapBIOSImage() 386 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14); in PCI_mapBIOSImage() 387 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_2, &saveBaseAddress18); in PCI_mapBIOSImage() 388 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20); in PCI_mapBIOSImage()
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D | bios.c | 262 dm_pci_read_config32(_BE_env.vgaInfo.pcidev,
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/external/u-boot/drivers/pci/ |
D | pci_auto.c | 45 dm_pci_read_config32(dev, bar, &bar_response); in dm_pciauto_setup_device() 72 dm_pci_read_config32(dev, bar + 4, in dm_pciauto_setup_device() 138 dm_pci_read_config32(dev, rom_addr, &bar_response); in dm_pciauto_setup_device()
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D | pci-uclass.c | 419 int dm_pci_read_config32(struct udevice *dev, int offset, u32 *valuep) in dm_pci_read_config32() function 465 ret = dm_pci_read_config32(dev, offset, &val); in dm_pci_clrset_config32() 1162 dm_pci_read_config32(dev, bar, &addr); in dm_pci_read_bar32() 1310 dm_pci_read_config32(dev, bar, &bar_response); in dm_pci_map_bar()
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D | pci_rom.c | 86 dm_pci_read_config32(dev, PCI_ROM_ADDRESS, &rom_address); in pci_rom_probe()
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/external/u-boot/arch/x86/cpu/intel_common/ |
D | pch.c | 15 dm_pci_read_config32(dev, SATA_SIRD, &data); in pch_common_sir_read()
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/external/u-boot/cmd/ |
D | pci.c | 121 dm_pci_read_config32(dev, reg_addr, &base_low); in pci_bar_show() 123 dm_pci_read_config32(dev, reg_addr, &size_low); in pci_bar_show() 137 dm_pci_read_config32(dev, reg_addr, &base_high); in pci_bar_show() 139 dm_pci_read_config32(dev, reg_addr, &size_high); in pci_bar_show()
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/external/u-boot/drivers/usb/host/ |
D | xhci-pci.c | 33 dm_pci_read_config32(dev, PCI_COMMAND, &cmd); in xhci_pci_init()
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D | ehci-pci.c | 43 dm_pci_read_config32(dev, PCI_COMMAND, &cmd); in ehci_pci_init()
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/external/u-boot/arch/x86/lib/ |
D | bios_interrupts.c | 185 dm_pci_read_config32(dev, reg, &dword); in int1a_handler()
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/external/u-boot/arch/x86/include/asm/ |
D | me_common.h | 360 dm_pci_read_config32(me_dev, offset, &dword); in pci_read_dword_ptr()
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/external/u-boot/arch/x86/cpu/ |
D | irq.c | 239 dm_pci_read_config32(dev->parent, ibase_off, &priv->ibase); in create_pirq_routing_table()
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/external/u-boot/drivers/video/ |
D | ivybridge_igd.c | 739 dm_pci_read_config32(dev, PCI_COMMAND, ®32); in gma_func0_init()
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/external/u-boot/drivers/spi/ |
D | ich.c | 105 dm_pci_read_config32(dev->parent, 0xb4, &fdod); in ich9_can_do_33mhz()
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/external/u-boot/drivers/net/ |
D | designware.c | 728 dm_pci_read_config32(dev, PCI_BASE_ADDRESS_0, &iobase); in designware_eth_probe()
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