Searched refs:dmc (Results 1 – 25 of 59) sorted by relevance
123
| /external/u-boot/arch/arm/mach-exynos/ |
| D | dmc_init_exynos4.c | 51 static void phy_control_reset(int ctrl_no, struct exynos4_dmc *dmc) in phy_control_reset() argument
55 &dmc->phycontrol1); in phy_control_reset()
57 &dmc->phycontrol1); in phy_control_reset()
60 &dmc->phycontrol0); in phy_control_reset()
62 &dmc->phycontrol0); in phy_control_reset()
66 static void dmc_config_mrs(struct exynos4_dmc *dmc, int chip) in dmc_config_mrs() argument
76 &dmc->directcmd); in dmc_config_mrs()
80 static void dmc_init(struct exynos4_dmc *dmc) in dmc_init() argument
87 writel(mem.control1, &dmc->phycontrol1); in dmc_init()
94 writel(mem.zqcontrol, &dmc->phyzqcontrol); in dmc_init()
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| D | dmc_init_ddr3.c | 39 struct exynos5_dmc *dmc; in ddr3_mem_ctrl_init() local
45 dmc = (struct exynos5_dmc *)samsung_get_base_dmc_ctrl(); in ddr3_mem_ctrl_init()
75 &dmc->concontrol); in ddr3_mem_ctrl_init()
77 update_reset_dll(&dmc->phycontrol0, DDR_MODE_DDR3); in ddr3_mem_ctrl_init()
102 update_reset_dll(&dmc->phycontrol0, DDR_MODE_DDR3); in ddr3_mem_ctrl_init()
105 &dmc->concontrol); in ddr3_mem_ctrl_init()
108 writel(mem->iv_size, &dmc->ivcontrol); in ddr3_mem_ctrl_init()
110 writel(mem->memconfig, &dmc->memconfig0); in ddr3_mem_ctrl_init()
111 writel(mem->memconfig, &dmc->memconfig1); in ddr3_mem_ctrl_init()
112 writel(mem->membaseconfig0, &dmc->membaseconfig0); in ddr3_mem_ctrl_init()
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| /external/webrtc/talk/media/base/ |
| D | rtpdataengine_unittest.cc | 170 rtc::scoped_ptr<cricket::RtpDataMediaChannel> dmc(CreateChannel()); in TEST_F() local
196 EXPECT_TRUE(dmc->SetSendParameters(send_parameters_known)); in TEST_F()
197 EXPECT_FALSE(dmc->SetSendParameters(send_parameters_unknown)); in TEST_F()
198 EXPECT_TRUE(dmc->SetSendParameters(send_parameters_mixed)); in TEST_F()
199 EXPECT_TRUE(dmc->SetRecvParameters(recv_parameters_known)); in TEST_F()
200 EXPECT_FALSE(dmc->SetRecvParameters(recv_parameters_unknown)); in TEST_F()
201 EXPECT_FALSE(dmc->SetRecvParameters(recv_parameters_mixed)); in TEST_F()
205 rtc::scoped_ptr<cricket::RtpDataMediaChannel> dmc(CreateChannel()); in TEST_F() local
209 EXPECT_TRUE(dmc->AddSendStream(stream1)); in TEST_F()
212 EXPECT_TRUE(dmc->AddSendStream(stream2)); in TEST_F()
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| /external/u-boot/doc/device-tree-bindings/clock/ |
| D | rockchip,rk3368-dmc.txt | 15 - compatible: "rockchip,rk3368-dmc"
54 #include <dt-bindings/memory/rk3368-dmc.h>
56 dmc: dmc@ff610000 {
58 compatible = "rockchip,rk3368-dmc";
63 &dmc {
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| D | rockchip,rk3399-dmc.txt | 3 - compatible: "rockchip,rk3399-dmc", "syscon"
18 dmc: dmc {
20 compatible = "rockchip,rk3399-dmc";
35 &dmc {
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| D | rockchip,rk3288-dmc.txt | 3 - compatible: "rockchip,rk3288-dmc", "syscon"
18 -logic-supply: this driver should adjust VDD_LOGIC according to dmc frequency, so need get logic-su…
113 dmc: dmc@ff610000 {
114 compatible = "rockchip,rk3288-dmc", "syscon";
132 &dmc {
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| /external/u-boot/arch/arm/dts/ |
| D | rk3368-lion-u-boot.dtsi | 28 &dmc {
41 * See doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt for
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| D | rk3368-sheep-u-boot.dtsi | 14 &dmc {
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| D | rk3368-px5-evb-u-boot.dtsi | 14 &dmc {
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| D | rk3368-geekbox-u-boot.dtsi | 14 &dmc {
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| D | rk3288-vyasa-u-boot.dtsi | 6 &dmc {
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| D | rk3288-miqi.dts | 18 &dmc {
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| D | rk3xxx.dtsi | 229 dmc: dmc@20020000 { label
231 compatible = "rockchip,rk3188-dmc", "syscon";
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| D | rk3288-evb.dts | 18 &dmc {
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| D | rk3288-fennec.dts | 18 &dmc {
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| D | rk3288-popmetal.dts | 18 &dmc {
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| D | rk3288-tinker.dts | 18 &dmc {
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| D | rk3288-firefly.dts | 23 &dmc {
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| D | rk3229-evb.dts | 41 &dmc {
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| D | exynos5420-smdk5420.dts | 132 dmc {
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| D | rk322x.dtsi | 765 dmc: dmc@11200000 { label
767 compatible = "rockchip,rk3228-dmc", "syscon";
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| D | rk3128.dtsi | 240 dmc: dmc@20004000 { label
242 compatible = "rockchip,rk3128-dmc", "syscon";
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| D | exynos54xx.dtsi | 195 dmc {
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| D | rk3368.dtsi | 49 #include <dt-bindings/memory/rk3368-dmc.h>
231 dmc: dmc@ff610000 { label
232 compatible = "rockchip,rk3368-dmc", "syscon";
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| /external/u-boot/drivers/ram/rockchip/ |
| D | Makefile | 7 obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
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