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Searched refs:dr4 (Results 1 – 25 of 25) sorted by relevance

/external/clang/test/Modules/
Dnamespaces.cpp37 double &dr4 = ::global2(1.0); in test() local
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dipra-reg-usage.ll6 …r6 $cr7 $cr8 $cr9 $cr10 $cr11 $cr12 $cr13 $cr14 $cr15 $dr0 $dr1 $dr2 $dr3 $dr4 $dr5 $dr6 $dr7 $dr8…
/external/libffi/src/sh64/
Dsysv.S139 fld.d r15, 0, dr4
346 fst.d r14, 40, dr4
/external/python/cpython2/Modules/_ctypes/libffi/src/sh64/
Dsysv.S139 fld.d r15, 0, dr4
346 fst.d r14, 40, dr4
/external/llvm/test/MC/X86/
Dx86-16.s313 movl %dr4,%eax
Dx86-32.s421 movl %dr4,%eax
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/X86/
Dx86-16.s325 movl %dr4,%eax
Dx86-32.s433 movl %dr4,%eax
/external/swiftshader/third_party/LLVM/test/MC/X86/
Dx86-32.s393 movl %dr4,%eax
/external/clang/test/CXX/drs/
Ddr0xx.cpp56 namespace dr4 { // dr4: yes namespace
/external/llvm/test/MC/Disassembler/X86/
Dx86-16.txt255 # CHECKX: movl %dr4, %eax
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/X86/
Dx86-16.txt255 # CHECKX: movl %dr4, %eax
/external/honggfuzz/examples/apache-httpd/corpus_http2/
D15cc0012a7059bb7e7c4657a6230aaad.000064ca.honggfuzz.cov113 p5�z���`-1�|x��wFv,��AEn� �dr4���]Y?p.���ȵ���׳�,�/��%V'��&`�InSkYcLG?#~J�s�W�2U{C�.��…
148 p5�z���`-1�|x��wFv,��AEn� �dr4���]Y?p.���ȵ���׳�,�/��%V'��&`�InSkYcLG?#~J�s�W�2U{C�.��…
/external/honggfuzz/examples/apache-httpd/corpus_http1/
D15cc0012a7059bb7e7c4657a6230aaad.000064ca.honggfuzz.cov113 p5�z���`-1�|x��wFv,��AEn� �dr4���]Y?p.���ȵ���׳�,�/��%V'��&`�InSkYcLG?#~J�s�W�2U{C�.��…
148 p5�z���`-1�|x��wFv,��AEn� �dr4���]Y?p.���ȵ���׳�,�/��%V'��&`�InSkYcLG?#~J�s�W�2U{C�.��…
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86RegisterInfo.td242 def DR4 : Register<"dr4">;
DX86GenAsmWriter.inc5433 "dr0\000dr1\000dr2\000dr3\000dr4\000dr5\000dr6\000dr7\000ds\000dx\000eax"
DX86GenAsmWriter1.inc6176 "dr0\000dr1\000dr2\000dr3\000dr4\000dr5\000dr6\000dr7\000ds\000dx\000eax"
DX86GenAsmMatcher.inc187 return 37; // "dr4"
/external/llvm/lib/Target/X86/
DX86RegisterInfo.td270 def DR4 : X86Reg<"dr4", 4>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86RegisterInfo.td319 def DR4 : X86Reg<"dr4", 4>;
/external/hyphenation-patterns/ga/
Dhyph-ga.pat.txt1889 dr4ú
/external/mesa3d/src/mesa/x86/
Dassyntax.h133 #define DR4 dr4
/external/hyphenation-patterns/nb/
Dhyph-nb.pat.txt4871 dr4
/external/hyphenation-patterns/nn/
Dhyph-nn.pat.txt4871 dr4
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/
DX86GenAsmMatcher.inc216 return 89; // "dr4"