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Searched refs:dram_clk_gate (Results 1 – 5 of 5) sorted by relevance

/external/u-boot/arch/arm/mach-sunxi/
Ddram_sun4i.c417 setbits_le32(&ccm->dram_clk_gate, CCM_DRAM_CTRL_DCLK_OUT); in dramc_clock_output_en()
419 clrbits_le32(&ccm->dram_clk_gate, CCM_DRAM_CTRL_DCLK_OUT); in dramc_clock_output_en()
/external/u-boot/arch/arm/include/asm/arch-sunxi/
Dclock_sun8i_a83t.h67 u32 dram_clk_gate; /* 0x100 DRAM module gating */ member
Dclock_sun4i.h64 u32 dram_clk_gate; /* 0x100 */ member
Dclock_sun6i.h69 u32 dram_clk_gate; /* 0x100 DRAM module gating */ member
/external/u-boot/drivers/video/sunxi/
Dsunxi_display.c351 setbits_le32(&ccm->dram_clk_gate, 1 << CCM_DRAM_GATE_OFFSET_DE_FE0); in sunxi_frontend_init()
452 setbits_le32(&ccm->dram_clk_gate, 1 << CCM_DRAM_GATE_OFFSET_DE_BE0); in sunxi_composer_init()