Searched refs:dramtmg8 (Results 1 – 13 of 13) sorted by relevance
59 writel(ddrc_regs_val->dramtmg8, &ddrc_regs->dramtmg8); in mx7_dram_cfg()
151 reg_val = readl(&mctl_ctl->dramtmg8); in auto_set_timing_para()156 writel(reg_val, &mctl_ctl->dramtmg8); in auto_set_timing_para()
183 reg_val = readl(&mctl_ctl->dramtmg8); in auto_set_timing_para()188 writel(reg_val, &mctl_ctl->dramtmg8); in auto_set_timing_para()
187 writel(0x00000008, &mctl_ctl->dramtmg8); in mctl_init()
38 u32 dramtmg8; member135 u32 dramtmg8; member
35 u32 dramtmg8; /* 0x0120 */ member
49 .dramtmg8 = 0x00000803,
79 u32 dramtmg8; member
54 u32 dramtmg8; /* 0x120 SDRAM Timing 8*/ member
84 DDRCTL_REG_TIMING(dramtmg8),
92 u32 dramtmg8; /* 0x78 dram timing parameters register 8 */ member
128 u32 dramtmg8; /* 0x120 */ member