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Searched refs:dreg (Results 1 – 25 of 32) sorted by relevance

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/external/v8/src/ppc/
Dsimulator-ppc.h138 void set_d_register_from_double(int dreg, const double dbl) { in set_d_register_from_double() argument
139 DCHECK(dreg >= 0 && dreg < kNumFPRs); in set_d_register_from_double()
140 *bit_cast<double*>(&fp_registers_[dreg]) = dbl; in set_d_register_from_double()
142 double get_double_from_d_register(int dreg) { in get_double_from_d_register() argument
143 DCHECK(dreg >= 0 && dreg < kNumFPRs); in get_double_from_d_register()
144 return *bit_cast<double*>(&fp_registers_[dreg]); in get_double_from_d_register()
146 void set_d_register(int dreg, int64_t value) { in set_d_register() argument
147 DCHECK(dreg >= 0 && dreg < kNumFPRs); in set_d_register()
148 fp_registers_[dreg] = value; in set_d_register()
150 int64_t get_d_register(int dreg) { in get_d_register() argument
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Ddeoptimizer-ppc.cc37 const DoubleRegister dreg = DoubleRegister::from_code(code); in Generate() local
39 __ stfd(dreg, MemOperand(sp, offset)); in Generate()
200 const DoubleRegister dreg = DoubleRegister::from_code(code); in Generate() local
202 __ lfd(dreg, MemOperand(r4, src_offset)); in Generate()
Dmacro-assembler-ppc.cc378 DoubleRegister dreg = DoubleRegister::from_code(i); in MultiPushDoubles() local
380 stfd(dreg, MemOperand(location, stack_offset)); in MultiPushDoubles()
390 DoubleRegister dreg = DoubleRegister::from_code(i); in MultiPopDoubles() local
391 lfd(dreg, MemOperand(location, stack_offset)); in MultiPopDoubles()
/external/v8/src/arm/
Dsimulator-arm.h101 void set_dw_register(int dreg, const int* dbl);
104 void get_d_register(int dreg, uint64_t* value);
105 void set_d_register(int dreg, const uint64_t* value);
106 void get_d_register(int dreg, uint32_t* value);
107 void set_d_register(int dreg, const uint32_t* value);
117 void set_d_register_from_double(int dreg, const Float64 dbl) { in set_d_register_from_double() argument
118 SetVFPRegister<Float64, 2>(dreg, dbl); in set_d_register_from_double()
120 void set_d_register_from_double(int dreg, const double dbl) { in set_d_register_from_double() argument
121 SetVFPRegister<double, 2>(dreg, dbl); in set_d_register_from_double()
124 Float64 get_double_from_d_register(int dreg) { in get_double_from_d_register() argument
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Dsimulator-arm.cc761 void Simulator::set_dw_register(int dreg, const int* dbl) { in set_dw_register() argument
762 DCHECK((dreg >= 0) && (dreg < num_d_registers)); in set_dw_register()
763 registers_[dreg] = dbl[0]; in set_dw_register()
764 registers_[dreg + 1] = dbl[1]; in set_dw_register()
768 void Simulator::get_d_register(int dreg, uint64_t* value) { in get_d_register() argument
769 DCHECK((dreg >= 0) && (dreg < DwVfpRegister::NumRegisters())); in get_d_register()
770 memcpy(value, vfp_registers_ + dreg * 2, sizeof(*value)); in get_d_register()
774 void Simulator::set_d_register(int dreg, const uint64_t* value) { in set_d_register() argument
775 DCHECK((dreg >= 0) && (dreg < DwVfpRegister::NumRegisters())); in set_d_register()
776 memcpy(vfp_registers_ + dreg * 2, value, sizeof(*value)); in set_d_register()
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/external/v8/src/s390/
Dsimulator-s390.h118 void set_d_register_from_double(int dreg, const double dbl) { in set_d_register_from_double() argument
119 DCHECK(dreg >= 0 && dreg < kNumFPRs); in set_d_register_from_double()
120 *bit_cast<double*>(&fp_registers_[dreg]) = dbl; in set_d_register_from_double()
123 double get_double_from_d_register(int dreg) { in get_double_from_d_register() argument
124 DCHECK(dreg >= 0 && dreg < kNumFPRs); in get_double_from_d_register()
125 return *bit_cast<double*>(&fp_registers_[dreg]); in get_double_from_d_register()
127 void set_d_register(int dreg, int64_t value) { in set_d_register() argument
128 DCHECK(dreg >= 0 && dreg < kNumFPRs); in set_d_register()
129 fp_registers_[dreg] = value; in set_d_register()
131 int64_t get_d_register(int dreg) { in get_d_register() argument
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Ddeoptimizer-s390.cc36 const DoubleRegister dreg = DoubleRegister::from_code(code); in Generate() local
38 __ StoreDouble(dreg, MemOperand(sp, offset)); in Generate()
44 const FloatRegister dreg = FloatRegister::from_code(code); in Generate() local
46 __ StoreFloat32(dreg, MemOperand(sp, offset)); in Generate()
207 const DoubleRegister dreg = DoubleRegister::from_code(code); in Generate() local
209 __ ld(dreg, MemOperand(r3, src_offset)); in Generate()
Dmacro-assembler-s390.cc412 DoubleRegister dreg = DoubleRegister::from_code(i); in MultiPushDoubles() local
414 StoreDouble(dreg, MemOperand(location, stack_offset)); in MultiPushDoubles()
424 DoubleRegister dreg = DoubleRegister::from_code(i); in MultiPopDoubles() local
425 LoadDouble(dreg, MemOperand(location, stack_offset)); in MultiPopDoubles()
/external/vixl/test/aarch32/
Dtest-utils-aarch32.cc145 const DRegister& dreg) { in Equal64() argument
146 return Equal64(expected, core, core->GetDRegisterBits(dreg.GetCode())); in Equal64()
236 const DRegister& dreg) { in EqualFP64() argument
238 uint64_t result = core->GetDRegisterBits(dreg.GetCode()); in EqualFP64()
Dtest-utils-aarch32.h191 const DRegister& dreg);
196 bool EqualFP32(float expected, const RegisterDump* core, const SRegister& dreg);
199 const DRegister& dreg);
/external/v8/src/arm64/
Dsimulator-arm64.cc520 TraceSim("Arguments: %f, %f\n", dreg(0), dreg(1)); in DoRuntimeCall()
521 int64_t result = target(dreg(0), dreg(1)); in DoRuntimeCall()
535 TraceSim("Argument: %f\n", dreg(0)); in DoRuntimeCall()
536 double result = target(dreg(0)); in DoRuntimeCall()
550 TraceSim("Arguments: %f, %f\n", dreg(0), dreg(1)); in DoRuntimeCall()
551 double result = target(dreg(0), dreg(1)); in DoRuntimeCall()
565 TraceSim("Arguments: %f, %d\n", dreg(0), wreg(0)); in DoRuntimeCall()
566 double result = target(dreg(0), wreg(0)); in DoRuntimeCall()
1794 case STR_d: MemoryWrite<double>(address, dreg(srcdst)); break; in LoadStoreHelper()
1957 MemoryWrite<double>(address, dreg(rt)); in LoadStorePairHelper()
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Dsimulator-arm64.h911 double dreg(unsigned code) const { return vreg<double>(code); } in dreg() function
2288 return static_cast<T>(dreg(0)); in ReadReturn()
/external/u-boot/drivers/usb/gadget/
Dat91_udc.c125 u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0)); in read_fifo() local
150 __raw_readsb((unsigned long)dreg, buf, count); in read_fifo()
201 u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0)); in write_fifo() local
252 __raw_writesb((unsigned long)dreg, buf, count); in write_fifo()
852 u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0)); in handle_setup() local
862 pkt.raw[i++] = __raw_readb(dreg); in handle_setup()
933 __raw_writeb(tmp, dreg); in handle_setup()
934 __raw_writeb(0, dreg); in handle_setup()
961 __raw_writeb(0, dreg); in handle_setup()
962 __raw_writeb(0, dreg); in handle_setup()
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/external/vixl/test/aarch64/
Dtest-utils-aarch64.h126 inline double dreg(unsigned code) const { in dreg() function
Dtest-utils-aarch64.cc235 return EqualFP64(expected, core, core->dreg(fpreg.GetCode())); in EqualFP64()
/external/vixl/test/aarch64/examples/
Dtest-examples.cc355 VIXL_CHECK(regs.dreg(0) == Add3DoubleC(A, B, C)); \
381 VIXL_CHECK(regs.dreg(0) == Add4DoubleC(A, B, C, D)); \
/external/vixl/src/aarch32/
Dassembler-aarch32.cc4375 const DRegister& dreg = dreglist.GetFirstDRegister(); in fldmdbx() local
4377 EmitT32_32(0xed300b01U | (rn.GetCode() << 16) | dreg.Encode(22, 12) | in fldmdbx()
4388 const DRegister& dreg = dreglist.GetFirstDRegister(); in fldmdbx() local
4391 dreg.Encode(22, 12) | (len & 0xff)); in fldmdbx()
4409 const DRegister& dreg = dreglist.GetFirstDRegister(); in fldmiax() local
4412 (write_back.GetWriteBackUint32() << 21) | dreg.Encode(22, 12) | in fldmiax()
4423 const DRegister& dreg = dreglist.GetFirstDRegister(); in fldmiax() local
4426 (write_back.GetWriteBackUint32() << 21) | dreg.Encode(22, 12) | in fldmiax()
4446 const DRegister& dreg = dreglist.GetFirstDRegister(); in fstmdbx() local
4448 EmitT32_32(0xed200b01U | (rn.GetCode() << 16) | dreg.Encode(22, 12) | in fstmdbx()
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/external/v8/src/mips64/
Dsimulator-mips64.h181 void set_dw_register(int dreg, const int* dbl);
/external/v8/src/mips/
Dsimulator-mips.h180 void set_dw_register(int dreg, const int* dbl);
/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_from_tgsi.cpp3926 Value *dreg = getSSA(8); in handleInstruction() local
3929 mkOp2(OP_MERGE, TYPE_U64, dreg, src0, src1); in handleInstruction()
3930 Instruction *cvt = mkCvt(OP_CVT, dstTy, dst0[c], srcTy, dreg); in handleInstruction()
3957 Value *dreg = getSSA(8); in handleInstruction() local
3958 Instruction *cvt = mkCvt(OP_CVT, dstTy, dreg, srcTy, fetchSrc(0, c / 2)); in handleInstruction()
3961 mkSplit(&dst0[c], 4, dreg); in handleInstruction()
Dnv50_ir_lowering_nvc0.cpp1636 Value *dreg = bld.getSSA(8); in handleCasExch() local
1638 bld.mkOp2(OP_MERGE, TYPE_U64, dreg, cas->getSrc(1), cas->getSrc(2)); in handleCasExch()
1639 cas->setSrc(1, dreg); in handleCasExch()
1640 cas->setSrc(2, dreg); in handleCasExch()
/external/llvm/test/CodeGen/ARM/
Dvector-load.ll227 ; Make sure we don't break smaller-than-dreg extloads.
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dvector-load.ll227 ; Make sure we don't break smaller-than-dreg extloads.
/external/mesa3d/src/gallium/drivers/r600/
Dr600_shader.c1017 int dreg = d->Semantic.Name == TGSI_SEMANTIC_TESSINNER ? 3 : 2; in tgsi_declaration() local
1031 do_lds_fetch_values(ctx, temp_reg, dreg, 0xf); in tgsi_declaration()
2868 int dreg = ctx->shader->output[output_idx].gpr; in r600_tess_factor_read() local
2885 do_lds_fetch_values(ctx, temp_reg, dreg, ((1u << nc) - 1)); in r600_tess_factor_read()
/external/vixl/src/aarch64/
Dsimulator-aarch64.h1036 VIXL_DEPRECATED("ReadDRegister", double dreg(unsigned code) const) {

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