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Searched refs:dreg_bits (Results 1 – 6 of 6) sorted by relevance

/external/vixl/test/aarch64/
Dtest-utils-aarch64.cc200 uint64_t result_64 = core->dreg_bits(fpreg.GetCode()); in EqualFP16()
218 uint64_t result_64 = core->dreg_bits(fpreg.GetCode()); in EqualFP32()
253 uint64_t result = core->dreg_bits(vreg.GetCode()); in Equal64()
302 uint64_t a_bits = a->dreg_bits(i); in EqualRegisters()
303 uint64_t b_bits = b->dreg_bits(i); in EqualRegisters()
Dtest-utils-aarch64.h121 inline uint64_t dreg_bits(unsigned code) const { in dreg_bits() function
127 return RawbitsToDouble(dreg_bits(code)); in dreg()
Dtest-assembler-aarch64.cc27333 ASSERT_EQUAL_64(INT64_C(0x3333333333333333), core.dreg_bits(10)); in TEST()
27338 ASSERT_EQUAL_64(INT64_C(0x3333333333333333), core.dreg_bits(11)); in TEST()
/external/v8/src/arm64/
Dsimulator-arm64.cc183 dreg_bits(fpregister_list.PopLowestIndex().code()); in CheckPCSComplianceAndRun()
199 dreg_bits(fpregister_list.PopLowestIndex().code())); in CheckPCSComplianceAndRun()
2593 case FMOV_xd: set_xreg(dst, dreg_bits(src)); break; in VisitFPIntegerConvert()
Dsimulator-arm64.h913 uint64_t dreg_bits(unsigned code) const { return vreg<uint64_t>(code); } in dreg_bits() function
/external/vixl/src/aarch64/
Dsimulator-aarch64.h1044 uint64_t dreg_bits(unsigned code) const) {