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Searched refs:drmCommandWriteRead (Results 1 – 25 of 44) sorted by relevance

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/external/mesa3d/src/gallium/winsys/svga/drm/
Dvmw_screen_ioctl.c106 ret = drmCommandWriteRead(vws->ioctl.drm_fd, in vmw_ioctl_extended_context_create()
182 ret = drmCommandWriteRead(vws->ioctl.drm_fd, DRM_VMW_CREATE_SURFACE, in vmw_ioctl_surface_create()
249 ret = drmCommandWriteRead(vws->ioctl.drm_fd, DRM_VMW_GB_SURFACE_CREATE, in vmw_ioctl_gb_surface_create()
371 ret = drmCommandWriteRead(vws->ioctl.drm_fd, DRM_VMW_GB_SURFACE_REF, in vmw_ioctl_gb_surface_ref()
532 ret = drmCommandWriteRead(vws->ioctl.drm_fd, DRM_VMW_ALLOC_DMABUF, &arg, in vmw_ioctl_region_create()
723 ret = drmCommandWriteRead(vws->ioctl.drm_fd, DRM_VMW_FENCE_SIGNALED, in vmw_ioctl_fence_signalled()
752 ret = drmCommandWriteRead(vws->ioctl.drm_fd, DRM_VMW_FENCE_WAIT, in vmw_ioctl_fence_finish()
788 ret = drmCommandWriteRead(vws->ioctl.drm_fd, DRM_VMW_CREATE_SHADER, in vmw_ioctl_shader_create()
900 ret = drmCommandWriteRead(vws->ioctl.drm_fd, DRM_VMW_GET_PARAM, in vmw_ioctl_init()
909 ret = drmCommandWriteRead(vws->ioctl.drm_fd, DRM_VMW_GET_PARAM, in vmw_ioctl_init()
[all …]
/external/libdrm/freedreno/msm/
Dmsm_bo.c44 ret = drmCommandWriteRead(bo->dev->fd, DRM_MSM_GEM_INFO, in bo_allocate()
100 ret = drmCommandWriteRead(bo->dev->fd, DRM_MSM_GEM_MADVISE, &req, sizeof(req)); in msm_bo_madvise()
114 drmCommandWriteRead(bo->dev->fd, DRM_MSM_GEM_INFO, &req, sizeof(req)); in msm_bo_iova()
145 ret = drmCommandWriteRead(dev->fd, DRM_MSM_GEM_NEW, in msm_bo_new_handle()
Dmsm_pipe.c41 ret = drmCommandWriteRead(pipe->dev->fd, DRM_MSM_GET_PARAM, in query_param()
117 ret = drmCommandWriteRead(pipe->dev->fd, DRM_MSM_SUBMITQUEUE_NEW, in open_submitqueue()
/external/libdrm/tegra/
Dtegra.c127 err = drmCommandWriteRead(drm->fd, DRM_TEGRA_GEM_CREATE, &args, in drm_tegra_bo_new()
255 err = drmCommandWriteRead(drm->fd, DRM_TEGRA_GEM_MMAP, &args, in drm_tegra_bo_map()
304 err = drmCommandWriteRead(drm->fd, DRM_TEGRA_GEM_GET_FLAGS, &args, in drm_tegra_bo_get_flags()
328 err = drmCommandWriteRead(drm->fd, DRM_TEGRA_GEM_SET_FLAGS, &args, in drm_tegra_bo_set_flags()
349 err = drmCommandWriteRead(drm->fd, DRM_TEGRA_GEM_GET_TILING, &args, in drm_tegra_bo_get_tiling()
377 err = drmCommandWriteRead(drm->fd, DRM_TEGRA_GEM_SET_TILING, &args, in drm_tegra_bo_set_tiling()
/external/libdrm/amdgpu/
Damdgpu_bo.c82 r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_GEM_CREATE, in amdgpu_bo_alloc()
115 return drmCommandWriteRead(bo->dev->fd, in amdgpu_bo_set_metadata()
136 r = drmCommandWriteRead(bo->dev->fd, DRM_AMDGPU_GEM_METADATA, in amdgpu_bo_query_info()
150 r = drmCommandWriteRead(bo->dev->fd, DRM_AMDGPU_GEM_OP, in amdgpu_bo_query_info()
453 r = drmCommandWriteRead(bo->dev->fd, DRM_AMDGPU_GEM_MMAP, &args, in amdgpu_bo_cpu_map()
521 r = drmCommandWriteRead(bo->dev->fd, DRM_AMDGPU_GEM_WAIT_IDLE, in amdgpu_bo_wait_for_idle()
546 r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_GEM_USERPTR, in amdgpu_create_bo_from_user_mem()
607 r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_BO_LIST, in amdgpu_bo_list_create()
629 r = drmCommandWriteRead(list->dev->fd, DRM_AMDGPU_BO_LIST, in amdgpu_bo_list_destroy()
673 r = drmCommandWriteRead(handle->dev->fd, DRM_AMDGPU_BO_LIST, in amdgpu_bo_list_update()
[all …]
Damdgpu_vm.c36 return drmCommandWriteRead(dev->fd, DRM_AMDGPU_VM, in amdgpu_vm_reserve_vmid()
47 return drmCommandWriteRead(dev->fd, DRM_AMDGPU_VM, in amdgpu_vm_unreserve_vmid()
Damdgpu_cs.c77 r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_CTX, &args, sizeof(args)); in amdgpu_cs_ctx_create2()
125 r = drmCommandWriteRead(context->dev->fd, DRM_AMDGPU_CTX, in amdgpu_cs_ctx_free()
156 r = drmCommandWriteRead(context->dev->fd, DRM_AMDGPU_CTX, in amdgpu_cs_query_reset_state()
312 r = drmCommandWriteRead(context->dev->fd, DRM_AMDGPU_CS, in amdgpu_cs_submit_one()
722 r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_CS, in amdgpu_cs_submit_raw()
765 r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_FENCE_TO_HANDLE, in amdgpu_cs_fence_to_handle()
/external/libdrm/radeon/
Dradeon_bo_gem.c105 r = drmCommandWriteRead(bom->fd, DRM_RADEON_GEM_CREATE, in bo_open()
169 r = drmCommandWriteRead(boi->bom->fd, in bo_map()
225 ret = drmCommandWriteRead(boi->bom->fd, DRM_RADEON_GEM_BUSY, in bo_is_busy()
242 r = drmCommandWriteRead(boi->bom->fd, in bo_set_tiling()
257 r = drmCommandWriteRead(boi->bom->fd, in bo_get_tiling()
354 r = drmCommandWriteRead(boi->bom->fd, in radeon_gem_set_domain()
/external/libdrm/freedreno/kgsl/
Dkgsl_bo.c57 ret = drmCommandWriteRead(bo->dev->fd, DRM_KGSL_GEM_ALLOC, in bo_alloc()
144 ret = drmCommandWriteRead(dev->fd, DRM_KGSL_GEM_CREATE, in kgsl_bo_new_handle()
237 ret = drmCommandWriteRead(bo->dev->fd, DRM_KGSL_GEM_GET_BUFINFO, in kgsl_bo_gpuaddr()
301 ret = drmCommandWriteRead(bo->dev->fd, DRM_KGSL_GEM_GET_BUFINFO, in kgsl_bo_get_timestamp()
/external/libdrm/tests/radeon/
Drbo.c72 r = drmCommandWriteRead(fd, DRM_RADEON_GEM_CREATE, in rbo()
108 r = drmCommandWriteRead(bo->fd, DRM_RADEON_GEM_MMAP, in rbo_map()
167 ret = drmCommandWriteRead(bo->fd, DRM_RADEON_GEM_WAIT_IDLE, in rbo_wait()
/external/libdrm/nouveau/
Dabi16.c45 ret = drmCommandWriteRead(drm->fd, DRM_NOUVEAU_CHANNEL_ALLOC, in abi16_chan_nv04()
66 ret = drmCommandWriteRead(drm->fd, DRM_NOUVEAU_CHANNEL_ALLOC, in abi16_chan_nvc0()
92 ret = drmCommandWriteRead(drm->fd, DRM_NOUVEAU_CHANNEL_ALLOC, in abi16_chan_nve0()
158 ret = drmCommandWriteRead(drm->fd, DRM_NOUVEAU_NOTIFIEROBJ_ALLOC, in abi16_ntfy()
354 ret = drmCommandWriteRead(drm->fd, DRM_NOUVEAU_GEM_NEW, in abi16_bo_init()
/external/libdrm/libkms/
Dintel.c108 ret = drmCommandWriteRead(kms->fd, DRM_I915_GEM_CREATE, &arg, sizeof(arg)); in intel_bo_create()
126 ret = drmCommandWriteRead(kms->fd, DRM_I915_GEM_SET_TILING, &tile, sizeof(tile)); in intel_bo_create()
168 ret = drmCommandWriteRead(bo->base.kms->fd, DRM_I915_GEM_MMAP_GTT, &arg, sizeof(arg)); in intel_bo_map()
Dradeon.c117 ret = drmCommandWriteRead(kms->fd, DRM_RADEON_GEM_CREATE, in radeon_bo_create()
166 ret = drmCommandWriteRead(bo->base.kms->fd, DRM_RADEON_GEM_MMAP, in radeon_bo_map()
Dvmwgfx.c101 ret = drmCommandWriteRead(bo->base.kms->fd, in vmwgfx_bo_create()
Dnouveau.c114 ret = drmCommandWriteRead(kms->fd, DRM_NOUVEAU_GEM_NEW, &arg, sizeof(arg)); in nouveau_bo_create()
Dexynos.c108 ret = drmCommandWriteRead(kms->fd, DRM_EXYNOS_GEM_CREATE, &arg, sizeof(arg)); in exynos_bo_create()
/external/libdrm/etnaviv/
Detnaviv_perfmon.c42 ret = drmCommandWriteRead(dev->fd, DRM_ETNAVIV_PM_QUERY_SIG, &req, sizeof(req)); in etna_perfmon_query_signals()
74 ret = drmCommandWriteRead(dev->fd, DRM_ETNAVIV_PM_QUERY_DOM, &req, sizeof(req)); in etna_perfmon_query_domains()
Detnaviv_bo.c121 ret = drmCommandWriteRead(dev->fd, DRM_ETNAVIV_GEM_NEW, in etna_bo_new()
149 ret = drmCommandWriteRead(bo->dev->fd, DRM_ETNAVIV_GEM_INFO, in get_buffer_info()
Detnaviv_gpu.c38 ret = drmCommandWriteRead(dev->fd, DRM_ETNAVIV_GET_PARAM, &req, sizeof(req)); in get_param()
/external/mesa3d/src/gallium/winsys/radeon/drm/
Dradeon_drm_bo.c68 return drmCommandWriteRead(bo->rws->fd, DRM_RADEON_GEM_BUSY, in radeon_real_bo_is_busy()
189 if (drmCommandWriteRead(bo->rws->fd, DRM_RADEON_GEM_OP, in radeon_bo_get_initial_domain()
362 if (drmCommandWriteRead(rws->fd, DRM_RADEON_GEM_VA, &va, in radeon_bo_destroy()
436 if (drmCommandWriteRead(bo->rws->fd, in radeon_bo_do_map()
624 if (drmCommandWriteRead(rws->fd, DRM_RADEON_GEM_CREATE, in radeon_create_bo()
668 r = drmCommandWriteRead(rws->fd, DRM_RADEON_GEM_VA, &va, sizeof(va)); in radeon_create_bo()
848 drmCommandWriteRead(bo->rws->fd, in radeon_bo_get_metadata()
909 drmCommandWriteRead(bo->rws->fd, in radeon_bo_set_metadata()
1036 if (drmCommandWriteRead(ws->fd, DRM_RADEON_GEM_USERPTR, in radeon_winsys_bo_from_ptr()
1076 r = drmCommandWriteRead(ws->fd, DRM_RADEON_GEM_VA, &va, sizeof(va)); in radeon_winsys_bo_from_ptr()
[all …]
Dradeon_drm_winsys.c81 if (drmCommandWriteRead(applier->ws->fd, DRM_RADEON_INFO, in radeon_set_fd_access()
113 retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info)); in radeon_get_drm_value()
338 drmCommandWriteRead(ws->fd, DRM_RADEON_GEM_USERPTR, in do_winsys_init()
343 retval = drmCommandWriteRead(ws->fd, DRM_RADEON_GEM_INFO, in do_winsys_init()
/external/libdrm/omap/
Domap_drm.c139 ret = drmCommandWriteRead(dev->fd, DRM_OMAP_GET_PARAM, &req, sizeof(req)); in omap_get_param()
206 if (drmCommandWriteRead(dev->fd, DRM_OMAP_GEM_NEW, &req, sizeof(req))) { in omap_bo_new_impl()
270 int ret = drmCommandWriteRead(bo->dev->fd, DRM_OMAP_GEM_INFO, in get_buffer_info()
/external/mesa3d/src/loader/
Dpci_id_driver_map.c38 ret = drmCommandWriteRead(fd, DRM_NOUVEAU_GETPARAM, &gp, sizeof(gp)); in nouveau_chipset()
/external/minigbm/
Dvc4.c69 ret = drmCommandWriteRead(bo->drv->fd, DRM_VC4_MMAP_BO, &bo_map, sizeof(bo_map)); in vc4_bo_map()
Dtegra.c248 ret = drmCommandWriteRead(bo->drv->fd, DRM_TEGRA_GEM_SET_TILING, &gem_tile, in tegra_bo_create()
307 ret = drmCommandWriteRead(bo->drv->fd, DRM_TEGRA_GEM_MMAP, &gem_map, sizeof(gem_map)); in tegra_bo_map()

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