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Searched refs:drotr32 (Results 1 – 25 of 45) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/
Dset-mips-directives.s31 drotr32 $1,$14,15
34 drotr32 $1,$14,15
37 drotr32 $1,$14,15
67 # CHECK: drotr32 $1, $14, 15
70 # CHECK: drotr32 $1, $14, 15
73 # CHECK: drotr32 $1, $14, 15
Drotations64.s108 # CHECK-64R: drotr32 $4, $4, 31 # encoding: [0x00,0x24,0x27,0xfe]
116 # CHECK-64R: drotr32 $4, $5, 31 # encoding: [0x00,0x25,0x27,0xfe]
121 # CHECK-64R: drotr32 $4, $5, 1 # encoding: [0x00,0x25,0x20,0x7e]
126 # CHECK-64R: drotr32 $4, $5, 0 # encoding: [0x00,0x25,0x20,0x3e]
144 # CHECK-64R: drotr32 $4, $5, 31 # encoding: [0x00,0x25,0x27,0xfe]
149 # CHECK-64R: drotr32 $4, $5, 1 # encoding: [0x00,0x25,0x20,0x7e]
154 # CHECK-64R: drotr32 $4, $5, 0 # encoding: [0x00,0x25,0x20,0x3e]
200 # CHECK-64R: drotr32 $4, $5, 0 # encoding: [0x00,0x25,0x20,0x3e]
205 # CHECK-64R: drotr32 $4, $5, 1 # encoding: [0x00,0x25,0x20,0x7e]
210 # CHECK-64R: drotr32 $4, $5, 31 # encoding: [0x00,0x25,0x27,0xfe]
[all …]
Dset-arch.s30 drotr32 $1, $14, 15
33 drotr32 $1, $14, 15
36 drotr32 $1, $14, 15
63 # CHECK: drotr32 $1, $14, 15
Dmips64-alu-instructions.s77 # CHECK: drotr32 $9, $6, 20 # encoding: [0x3e,0x4d,0x26,0x00]
102 drotr32 $9, $6, 20
Dset-mips-directives-bad.s33 drotr32 $1,$14,15 # CHECK: error: instruction requires a CPU feature not currently enabled
/external/llvm/test/MC/Mips/
Dset-mips-directives.s31 drotr32 $1,$14,15
34 drotr32 $1,$14,15
37 drotr32 $1,$14,15
67 # CHECK: drotr32 $1, $14, 15
70 # CHECK: drotr32 $1, $14, 15
73 # CHECK: drotr32 $1, $14, 15
Drotations64.s108 # CHECK-64R: drotr32 $4, $4, 31 # encoding: [0x00,0x24,0x27,0xfe]
116 # CHECK-64R: drotr32 $4, $5, 31 # encoding: [0x00,0x25,0x27,0xfe]
121 # CHECK-64R: drotr32 $4, $5, 1 # encoding: [0x00,0x25,0x20,0x7e]
126 # CHECK-64R: drotr32 $4, $5, 0 # encoding: [0x00,0x25,0x20,0x3e]
144 # CHECK-64R: drotr32 $4, $5, 31 # encoding: [0x00,0x25,0x27,0xfe]
149 # CHECK-64R: drotr32 $4, $5, 1 # encoding: [0x00,0x25,0x20,0x7e]
154 # CHECK-64R: drotr32 $4, $5, 0 # encoding: [0x00,0x25,0x20,0x3e]
200 # CHECK-64R: drotr32 $4, $5, 0 # encoding: [0x00,0x25,0x20,0x3e]
205 # CHECK-64R: drotr32 $4, $5, 1 # encoding: [0x00,0x25,0x20,0x7e]
210 # CHECK-64R: drotr32 $4, $5, 31 # encoding: [0x00,0x25,0x27,0xfe]
[all …]
Dset-arch.s30 drotr32 $1, $14, 15
33 drotr32 $1, $14, 15
36 drotr32 $1, $14, 15
63 # CHECK: drotr32 $1, $14, 15
Dmips64-alu-instructions.s77 # CHECK: drotr32 $9, $6, 20 # encoding: [0x3e,0x4d,0x26,0x00]
102 drotr32 $9, $6, 20
Dset-mips-directives-bad.s33 drotr32 $1,$14,15 # CHECK: error: instruction requires a CPU feature not currently enabled
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64/
Dinvalid-mips64r2.s17 …drotr32 $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
18 …drotr32 $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
/external/llvm/test/MC/Mips/mips64/
Dinvalid-mips64r2.s17 …drotr32 $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
18 …drotr32 $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
/external/capstone/suite/MC/Mips/
Dmips64-alu-instructions.s.cs39 0x3e,0x4d,0x26,0x00 = drotr32 $9, $6, 52
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips5/
Dinvalid-mips64r2.s16 …drotr32 $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
17 …drotr32 $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
/external/llvm/test/MC/Mips/mips5/
Dinvalid-mips64r2.s16 …drotr32 $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
17 …drotr32 $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
/external/llvm/test/MC/Mips/mips64r2/
Dvalid.s98 …drotr32 $1,15 # CHECK: drotr32 $1, $1, 15 # encoding: [0x00,0x21,0x0b,0x…
99 …drotr32 $1,$14,15 # CHECK: drotr32 $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0x…
/external/llvm/test/MC/Mips/mips64r3/
Dvalid.s98 …drotr32 $1,15 # CHECK: drotr32 $1, $1, 15 # encoding: [0x00,0x21,0x0b,0x…
99 …drotr32 $1,$14,15 # CHECK: drotr32 $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0x…
/external/llvm/test/MC/Mips/mips64r5/
Dvalid.s98 …drotr32 $1,15 # CHECK: drotr32 $1, $1, 15 # encoding: [0x00,0x21,0x0b,0x…
99 …drotr32 $1,$14,15 # CHECK: drotr32 $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0x…
/external/swiftshader/third_party/LLVM/test/CodeGen/Mips/
Dmips64shift.ll97 ; CHECK: drotr32 ${{[0-9]+}}, ${{[0-9]+}}, 22
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r3/
Dvalid.s138 …drotr32 $1,15 # CHECK: drotr32 $1, $1, 15 # encoding: [0x00,0x21,0x0b,0x…
139 …drotr32 $1,$14,15 # CHECK: drotr32 $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0x…
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r5/
Dvalid.s138 …drotr32 $1,15 # CHECK: drotr32 $1, $1, 15 # encoding: [0x00,0x21,0x0b,0x…
139 …drotr32 $1,$14,15 # CHECK: drotr32 $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0x…
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r2/
Dvalid.s144 …drotr32 $1,15 # CHECK: drotr32 $1, $1, 15 # encoding: [0x00,0x21,0x0b,0x…
145 …drotr32 $1,$14,15 # CHECK: drotr32 $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0x…
/external/llvm/test/MC/Disassembler/Mips/mips64r5/
Dvalid-mips64r5-el.txt124 0xfe 0x0b 0x21 0x00 # CHECK: drotr32 $1, $1, 15
125 0xfe 0x0b 0x2e 0x00 # CHECK: drotr32 $1, $14, 15
/external/llvm/test/MC/Disassembler/Mips/mips64r3/
Dvalid-mips64r3-el.txt124 0xfe 0x0b 0x21 0x00 # CHECK: drotr32 $1, $1, 15
125 0xfe 0x0b 0x2e 0x00 # CHECK: drotr32 $1, $14, 15
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64r3/
Dvalid-mips64r3-el.txt125 0xfe 0x0b 0x21 0x00 # CHECK: drotr32 $1, $1, 15
126 0xfe 0x0b 0x2e 0x00 # CHECK: drotr32 $1, $14, 15

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