/external/llvm/test/MC/AMDGPU/ |
D | ds.s | 89 ds_and_b32 v2, v4 label
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/ |
D | ds.s | 106 ds_and_b32 v2, v4 label
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D | gfx7_asm_all.s | 192 ds_and_b32 v1, v2 offset:65535 label 195 ds_and_b32 v255, v2 offset:65535 label 198 ds_and_b32 v1, v255 offset:65535 label 201 ds_and_b32 v1, v2 label 204 ds_and_b32 v1, v2 offset:0 label 207 ds_and_b32 v1, v2 offset:4 label 210 ds_and_b32 v1, v2 offset:65535 gds label
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D | gfx8_asm_all.s | 192 ds_and_b32 v1, v2 offset:65535 label 195 ds_and_b32 v255, v2 offset:65535 label 198 ds_and_b32 v1, v255 offset:65535 label 201 ds_and_b32 v1, v2 label 204 ds_and_b32 v1, v2 offset:0 label 207 ds_and_b32 v1, v2 offset:4 label 210 ds_and_b32 v1, v2 offset:65535 gds label
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D | gfx9_asm_all.s | 193 ds_and_b32 v1, v2 offset:65535 label 196 ds_and_b32 v255, v2 offset:65535 label 199 ds_and_b32 v1, v255 offset:65535 label 202 ds_and_b32 v1, v2 label 205 ds_and_b32 v1, v2 offset:0 label 208 ds_and_b32 v1, v2 offset:4 label 211 ds_and_b32 v1, v2 offset:65535 gds label
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/external/llvm/test/CodeGen/AMDGPU/ |
D | local-atomics.ll | 427 ; GCN: ds_and_b32 435 ; GCN: ds_and_b32 v{{[0-9]+}}, v{{[0-9]+}} offset:16
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
D | local-atomics.ll | 554 ; GCN: ds_and_b32 565 ; GCN: ds_and_b32 v{{[0-9]+}}, v{{[0-9]+}} offset:16
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | DSInstructions.td | 371 defm DS_AND_B32 : DS_1A1D_NORET_mc<"ds_and_b32">; 437 defm DS_AND_RTN_B32 : DS_1A1D_RET_mc<"ds_and_rtn_b32", VGPR_32, "ds_and_b32">;
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/ |
D | ds_vi.txt | 51 # VI: ds_and_b32 v2, v4 ; encoding: [0x00,0x00,0x12,0xd8,0x02,0x04,0x00,0x00]
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D | gfx8_dasm_all.txt | 165 # CHECK: ds_and_b32 v1, v2 offset:65535 ; encoding: [0xff,0xff,0x12,0xd8,0x01,0x02,0x00,0x00] 168 # CHECK: ds_and_b32 v255, v2 offset:65535 ; encoding: [0xff,0xff,0x12,0xd8,0xff,0x02,0x00,0x00] 171 # CHECK: ds_and_b32 v1, v255 offset:65535 ; encoding: [0xff,0xff,0x12,0xd8,0x01,0xff,0x00,0x00] 174 # CHECK: ds_and_b32 v1, v2 ; encoding: [0x00,0x00,0x12,0xd8,0x01,0x02,0x00,0x00] 177 # CHECK: ds_and_b32 v1, v2 offset:4 ; encoding: [0x04,0x00,0x12,0xd8,0x01,0x02,0x00,0x00] 180 # CHECK: ds_and_b32 v1, v2 offset:65535 gds ; encoding: [0xff,0xff,0x13,0xd8,0x01,0x02,0x00,0x00]
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D | gfx9_dasm_all.txt | 165 # CHECK: ds_and_b32 v1, v2 offset:65535 ; encoding: [0xff,0xff,0x12,0xd8,0x01,0x02,0x00,0x00] 168 # CHECK: ds_and_b32 v255, v2 offset:65535 ; encoding: [0xff,0xff,0x12,0xd8,0xff,0x02,0x00,0x00] 171 # CHECK: ds_and_b32 v1, v255 offset:65535 ; encoding: [0xff,0xff,0x12,0xd8,0x01,0xff,0x00,0x00] 174 # CHECK: ds_and_b32 v1, v2 ; encoding: [0x00,0x00,0x12,0xd8,0x01,0x02,0x00,0x00] 177 # CHECK: ds_and_b32 v1, v2 offset:4 ; encoding: [0x04,0x00,0x12,0xd8,0x01,0x02,0x00,0x00] 180 # CHECK: ds_and_b32 v1, v2 offset:65535 gds ; encoding: [0xff,0xff,0x13,0xd8,0x01,0x02,0x00,0x00]
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/external/llvm/test/MC/Disassembler/AMDGPU/ |
D | ds_vi.txt | 51 # VI: ds_and_b32 v2, v4 ; encoding: [0x00,0x00,0x12,0xd8,0x02,0x04,0x00,0x00]
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/external/llvm/lib/Target/AMDGPU/ |
D | SIInstructions.td | 779 defm DS_AND_B32 : DS_1A1D_NORET <0x9, "ds_and_b32", VGPR_32>; 811 defm DS_AND_RTN_B32 : DS_1A1D_RET <0x29, "ds_and_rtn_b32", VGPR_32, "ds_and_b32">;
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/external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
D | AMDGPUAsmGFX7.rst | 27 …ds_and_b32 src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
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D | AMDGPUAsmGFX8.rst | 30 …ds_and_b32 src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
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D | AMDGPUAsmGFX9.rst | 30 …ds_and_b32 src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
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