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Searched refs:ds_dec_rtn_u64 (Results 1 – 16 of 16) sorted by relevance

/external/llvm/test/MC/AMDGPU/
Dds.s381 ds_dec_rtn_u64 v[8:9] v2, v[4:5] label
/external/llvm/test/CodeGen/AMDGPU/
Dllvm.amdgcn.atomic.dec.ll256 ; GCN: ds_dec_rtn_u64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}}, v{{\[}}[[KLO]]:[[KHI]]{{\]}}{{$}}
266 ; GCN: ds_dec_rtn_u64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}}, v{{\[}}[[KLO]]:[[KHI]]{{\]}} offset:32
365 ; GCN: ds_dec_rtn_u64 v{{\[[0-9]+:[0-9]+\]}}, [[PTR]], v{{\[[0-9]+:[0-9]+\]}} offset:16
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dllvm.amdgcn.atomic.dec.ll317 ; GCN: ds_dec_rtn_u64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}}, v{{\[}}[[KLO]]:[[KHI]]{{\]}}{{$}}
330 ; GCN: ds_dec_rtn_u64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}}, v{{\[}}[[KLO]]:[[KHI]]{{\]}} offset:32
444 ; GCN: ds_dec_rtn_u64 v{{\[[0-9]+:[0-9]+\]}}, [[PTR]], v{{\[[0-9]+:[0-9]+\]}} offset:16
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/
Dds.s415 ds_dec_rtn_u64 v[8:9] v2, v[4:5] label
Dgfx7_asm_all.s1911 ds_dec_rtn_u64 v[5:6], v1, v[2:3] offset:65535 label
1914 ds_dec_rtn_u64 v[254:255], v1, v[2:3] offset:65535 label
1917 ds_dec_rtn_u64 v[5:6], v255, v[2:3] offset:65535 label
1920 ds_dec_rtn_u64 v[5:6], v1, v[254:255] offset:65535 label
1923 ds_dec_rtn_u64 v[5:6], v1, v[2:3] label
1926 ds_dec_rtn_u64 v[5:6], v1, v[2:3] offset:0 label
1929 ds_dec_rtn_u64 v[5:6], v1, v[2:3] offset:4 label
1932 ds_dec_rtn_u64 v[5:6], v1, v[2:3] offset:65535 gds label
Dgfx8_asm_all.s1863 ds_dec_rtn_u64 v[5:6], v1, v[2:3] offset:65535 label
1866 ds_dec_rtn_u64 v[254:255], v1, v[2:3] offset:65535 label
1869 ds_dec_rtn_u64 v[5:6], v255, v[2:3] offset:65535 label
1872 ds_dec_rtn_u64 v[5:6], v1, v[254:255] offset:65535 label
1875 ds_dec_rtn_u64 v[5:6], v1, v[2:3] label
1878 ds_dec_rtn_u64 v[5:6], v1, v[2:3] offset:0 label
1881 ds_dec_rtn_u64 v[5:6], v1, v[2:3] offset:4 label
1884 ds_dec_rtn_u64 v[5:6], v1, v[2:3] offset:65535 gds label
Dgfx9_asm_all.s2032 ds_dec_rtn_u64 v[5:6], v1, v[2:3] offset:65535 label
2035 ds_dec_rtn_u64 v[254:255], v1, v[2:3] offset:65535 label
2038 ds_dec_rtn_u64 v[5:6], v255, v[2:3] offset:65535 label
2041 ds_dec_rtn_u64 v[5:6], v1, v[254:255] offset:65535 label
2044 ds_dec_rtn_u64 v[5:6], v1, v[2:3] label
2047 ds_dec_rtn_u64 v[5:6], v1, v[2:3] offset:0 label
2050 ds_dec_rtn_u64 v[5:6], v1, v[2:3] offset:4 label
2053 ds_dec_rtn_u64 v[5:6], v1, v[2:3] offset:65535 gds label
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/
Dds_vi.txt270 # VI: ds_dec_rtn_u64 v[8:9], v2, v[4:5] ; encoding: [0x00,0x00,0xc8,0xd8,0x02,0x04,0x00,0x08]
Dgfx8_dasm_all.txt1587 # CHECK: ds_dec_rtn_u64 v[5:6], v1, v[2:3] offset:65535 ; encoding: [0xff,0xff,0xc8,0xd8,0x01,0x…
1590 # CHECK: ds_dec_rtn_u64 v[254:255], v1, v[2:3] offset:65535 ; encoding: [0xff,0xff,0xc8,0xd8,0x0…
1593 # CHECK: ds_dec_rtn_u64 v[5:6], v255, v[2:3] offset:65535 ; encoding: [0xff,0xff,0xc8,0xd8,0xff,…
1596 # CHECK: ds_dec_rtn_u64 v[5:6], v1, v[254:255] offset:65535 ; encoding: [0xff,0xff,0xc8,0xd8,0x0…
1599 # CHECK: ds_dec_rtn_u64 v[5:6], v1, v[2:3] ; encoding: [0x00,0x00,0xc8,0xd8,0x01,0x02,0x00,0x05]
1602 # CHECK: ds_dec_rtn_u64 v[5:6], v1, v[2:3] offset:4 ; encoding: [0x04,0x00,0xc8,0xd8,0x01,0x02,0…
1605 # CHECK: ds_dec_rtn_u64 v[5:6], v1, v[2:3] offset:65535 gds ; encoding: [0xff,0xff,0xc9,0xd8,0x0…
Dgfx9_dasm_all.txt1731 # CHECK: ds_dec_rtn_u64 v[5:6], v1, v[2:3] offset:65535 ; encoding: [0xff,0xff,0xc8,0xd8,0x01,0x…
1734 # CHECK: ds_dec_rtn_u64 v[254:255], v1, v[2:3] offset:65535 ; encoding: [0xff,0xff,0xc8,0xd8,0x0…
1737 # CHECK: ds_dec_rtn_u64 v[5:6], v255, v[2:3] offset:65535 ; encoding: [0xff,0xff,0xc8,0xd8,0xff,…
1740 # CHECK: ds_dec_rtn_u64 v[5:6], v1, v[254:255] offset:65535 ; encoding: [0xff,0xff,0xc8,0xd8,0x0…
1743 # CHECK: ds_dec_rtn_u64 v[5:6], v1, v[2:3] ; encoding: [0x00,0x00,0xc8,0xd8,0x01,0x02,0x00,0x05]
1746 # CHECK: ds_dec_rtn_u64 v[5:6], v1, v[2:3] offset:4 ; encoding: [0x04,0x00,0xc8,0xd8,0x01,0x02,0…
1749 # CHECK: ds_dec_rtn_u64 v[5:6], v1, v[2:3] offset:65535 gds ; encoding: [0xff,0xff,0xc9,0xd8,0x0…
/external/llvm/test/MC/Disassembler/AMDGPU/
Dds_vi.txt270 # VI: ds_dec_rtn_u64 v[8:9], v2, v[4:5] ; encoding: [0x00,0x00,0xc8,0xd8,0x02,0x04,0x00,0x08]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DDSInstructions.td454 defm DS_DEC_RTN_U64 : DS_1A1D_RET_mc<"ds_dec_rtn_u64", VReg_64, "ds_dec_u64">;
/external/swiftshader/third_party/llvm-7.0/llvm/docs/
DAMDGPUAsmGFX7.rst45 …ds_dec_rtn_u64 dst, src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
DAMDGPUAsmGFX8.rst49 …ds_dec_rtn_u64 dst, src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
DAMDGPUAsmGFX9.rst49 …ds_dec_rtn_u64 dst, src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
/external/llvm/lib/Target/AMDGPU/
DSIInstructions.td870 defm DS_DEC_RTN_U64 : DS_1A1D_RET <0x64, "ds_dec_rtn_u64", VReg_64, "ds_dec_u64">;