/external/llvm/test/MC/AMDGPU/ |
D | ds.s | 301 ds_dec_u64 v2, v[4:5] label
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/ |
D | ds.s | 335 ds_dec_u64 v2, v[4:5] label
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D | gfx7_asm_all.s | 1446 ds_dec_u64 v1, v[2:3] offset:65535 label 1449 ds_dec_u64 v255, v[2:3] offset:65535 label 1452 ds_dec_u64 v1, v[254:255] offset:65535 label 1455 ds_dec_u64 v1, v[2:3] label 1458 ds_dec_u64 v1, v[2:3] offset:0 label 1461 ds_dec_u64 v1, v[2:3] offset:4 label 1464 ds_dec_u64 v1, v[2:3] offset:65535 gds label
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D | gfx8_asm_all.s | 1398 ds_dec_u64 v1, v[2:3] offset:65535 label 1401 ds_dec_u64 v255, v[2:3] offset:65535 label 1404 ds_dec_u64 v1, v[254:255] offset:65535 label 1407 ds_dec_u64 v1, v[2:3] label 1410 ds_dec_u64 v1, v[2:3] offset:0 label 1413 ds_dec_u64 v1, v[2:3] offset:4 label 1416 ds_dec_u64 v1, v[2:3] offset:65535 gds label
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D | gfx9_asm_all.s | 1399 ds_dec_u64 v1, v[2:3] offset:65535 label 1402 ds_dec_u64 v255, v[2:3] offset:65535 label 1405 ds_dec_u64 v1, v[254:255] offset:65535 label 1408 ds_dec_u64 v1, v[2:3] label 1411 ds_dec_u64 v1, v[2:3] offset:0 label 1414 ds_dec_u64 v1, v[2:3] offset:4 label 1417 ds_dec_u64 v1, v[2:3] offset:65535 gds label
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/external/llvm/test/CodeGen/AMDGPU/ |
D | llvm.amdgcn.atomic.dec.ll | 277 ; GCN: ds_dec_u64 v{{[0-9]+}}, v{{\[}}[[KLO]]:[[KHI]]{{\]}}{{$}} 286 ; GCN: ds_dec_u64 v{{[0-9]+}}, v{{\[}}[[KLO]]:[[KHI]]{{\]}} offset:32{{$}}
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
D | llvm.amdgcn.atomic.dec.ll | 344 ; GCN: ds_dec_u64 v{{[0-9]+}}, v{{\[}}[[KLO]]:[[KHI]]{{\]}}{{$}} 356 ; GCN: ds_dec_u64 v{{[0-9]+}}, v{{\[}}[[KLO]]:[[KHI]]{{\]}} offset:32{{$}}
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | DSInstructions.td | 408 defm DS_DEC_U64 : DS_1A1D_NORET_mc<"ds_dec_u64", VReg_64>; 454 defm DS_DEC_RTN_U64 : DS_1A1D_RET_mc<"ds_dec_rtn_u64", VReg_64, "ds_dec_u64">;
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/ |
D | ds_vi.txt | 210 # VI: ds_dec_u64 v2, v[4:5] ; encoding: [0x00,0x00,0x88,0xd8,0x02,0x04,0x00,0x00]
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D | gfx8_dasm_all.txt | 1188 # CHECK: ds_dec_u64 v1, v[2:3] offset:65535 ; encoding: [0xff,0xff,0x88,0xd8,0x01,0x02,0x00,0x00] 1191 # CHECK: ds_dec_u64 v255, v[2:3] offset:65535 ; encoding: [0xff,0xff,0x88,0xd8,0xff,0x02,0x00,0x… 1194 # CHECK: ds_dec_u64 v1, v[254:255] offset:65535 ; encoding: [0xff,0xff,0x88,0xd8,0x01,0xfe,0x00,… 1197 # CHECK: ds_dec_u64 v1, v[2:3] ; encoding: [0x00,0x00,0x88,0xd8,0x01,0x02,0x00,0x00] 1200 # CHECK: ds_dec_u64 v1, v[2:3] offset:4 ; encoding: [0x04,0x00,0x88,0xd8,0x01,0x02,0x00,0x00] 1203 # CHECK: ds_dec_u64 v1, v[2:3] offset:65535 gds ; encoding: [0xff,0xff,0x89,0xd8,0x01,0x02,0x00,…
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D | gfx9_dasm_all.txt | 1188 # CHECK: ds_dec_u64 v1, v[2:3] offset:65535 ; encoding: [0xff,0xff,0x88,0xd8,0x01,0x02,0x00,0x00] 1191 # CHECK: ds_dec_u64 v255, v[2:3] offset:65535 ; encoding: [0xff,0xff,0x88,0xd8,0xff,0x02,0x00,0x… 1194 # CHECK: ds_dec_u64 v1, v[254:255] offset:65535 ; encoding: [0xff,0xff,0x88,0xd8,0x01,0xfe,0x00,… 1197 # CHECK: ds_dec_u64 v1, v[2:3] ; encoding: [0x00,0x00,0x88,0xd8,0x01,0x02,0x00,0x00] 1200 # CHECK: ds_dec_u64 v1, v[2:3] offset:4 ; encoding: [0x04,0x00,0x88,0xd8,0x01,0x02,0x00,0x00] 1203 # CHECK: ds_dec_u64 v1, v[2:3] offset:65535 gds ; encoding: [0xff,0xff,0x89,0xd8,0x01,0x02,0x00,…
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/external/llvm/test/MC/Disassembler/AMDGPU/ |
D | ds_vi.txt | 210 # VI: ds_dec_u64 v2, v[4:5] ; encoding: [0x00,0x00,0x88,0xd8,0x02,0x04,0x00,0x00]
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/external/llvm/lib/Target/AMDGPU/ |
D | SIInstructions.td | 847 defm DS_DEC_U64 : DS_1A1D_NORET <0x44, "ds_dec_u64", VReg_64>; 870 defm DS_DEC_RTN_U64 : DS_1A1D_RET <0x64, "ds_dec_rtn_u64", VReg_64, "ds_dec_u64">;
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/external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
D | AMDGPUAsmGFX7.rst | 49 …ds_dec_u64 src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
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D | AMDGPUAsmGFX8.rst | 53 …ds_dec_u64 src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
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D | AMDGPUAsmGFX9.rst | 53 …ds_dec_u64 src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
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