| /external/llvm/test/MC/AMDGPU/ |
| D | ds.s | 297 ds_inc_u64 v2, v[4:5] label
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/ |
| D | ds.s | 331 ds_inc_u64 v2, v[4:5] label
|
| D | gfx7_asm_all.s | 1425 ds_inc_u64 v1, v[2:3] offset:65535 label
1428 ds_inc_u64 v255, v[2:3] offset:65535 label
1431 ds_inc_u64 v1, v[254:255] offset:65535 label
1434 ds_inc_u64 v1, v[2:3] label
1437 ds_inc_u64 v1, v[2:3] offset:0 label
1440 ds_inc_u64 v1, v[2:3] offset:4 label
1443 ds_inc_u64 v1, v[2:3] offset:65535 gds label
|
| D | gfx8_asm_all.s | 1377 ds_inc_u64 v1, v[2:3] offset:65535 label
1380 ds_inc_u64 v255, v[2:3] offset:65535 label
1383 ds_inc_u64 v1, v[254:255] offset:65535 label
1386 ds_inc_u64 v1, v[2:3] label
1389 ds_inc_u64 v1, v[2:3] offset:0 label
1392 ds_inc_u64 v1, v[2:3] offset:4 label
1395 ds_inc_u64 v1, v[2:3] offset:65535 gds label
|
| D | gfx9_asm_all.s | 1378 ds_inc_u64 v1, v[2:3] offset:65535 label
1381 ds_inc_u64 v255, v[2:3] offset:65535 label
1384 ds_inc_u64 v1, v[254:255] offset:65535 label
1387 ds_inc_u64 v1, v[2:3] label
1390 ds_inc_u64 v1, v[2:3] offset:0 label
1393 ds_inc_u64 v1, v[2:3] offset:4 label
1396 ds_inc_u64 v1, v[2:3] offset:65535 gds label
|
| /external/llvm/test/CodeGen/AMDGPU/ |
| D | llvm.amdgcn.atomic.inc.ll | 152 ; GCN: ds_inc_u64 v{{[0-9]+}}, v{{\[}}[[KLO]]:[[KHI]]{{\]}}{{$}}
161 ; GCN: ds_inc_u64 v{{[0-9]+}}, v{{\[}}[[KLO]]:[[KHI]]{{\]}} offset:32{{$}}
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
| D | llvm.amdgcn.atomic.inc.ll | 170 ; GCN: ds_inc_u64 v{{[0-9]+}}, v{{\[}}[[KLO]]:[[KHI]]{{\]}}{{$}}
179 ; GCN: ds_inc_u64 v{{[0-9]+}}, v{{\[}}[[KLO]]:[[KHI]]{{\]}} offset:32{{$}}
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | DSInstructions.td | 407 defm DS_INC_U64 : DS_1A1D_NORET_mc<"ds_inc_u64", VReg_64>;
453 defm DS_INC_RTN_U64 : DS_1A1D_RET_mc<"ds_inc_rtn_u64", VReg_64, "ds_inc_u64">;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/ |
| D | ds_vi.txt | 207 # VI: ds_inc_u64 v2, v[4:5] ; encoding: [0x00,0x00,0x86,0xd8,0x02,0x04,0x00,0x00]
|
| D | gfx8_dasm_all.txt | 1170 # CHECK: ds_inc_u64 v1, v[2:3] offset:65535 ; encoding: [0xff,0xff,0x86,0xd8,0x01,0x02,0x00,0x00]
1173 # CHECK: ds_inc_u64 v255, v[2:3] offset:65535 ; encoding: [0xff,0xff,0x86,0xd8,0xff,0x02,0x00,0x…
1176 # CHECK: ds_inc_u64 v1, v[254:255] offset:65535 ; encoding: [0xff,0xff,0x86,0xd8,0x01,0xfe,0x00,…
1179 # CHECK: ds_inc_u64 v1, v[2:3] ; encoding: [0x00,0x00,0x86,0xd8,0x01,0x02,0x00,0x00]
1182 # CHECK: ds_inc_u64 v1, v[2:3] offset:4 ; encoding: [0x04,0x00,0x86,0xd8,0x01,0x02,0x00,0x00]
1185 # CHECK: ds_inc_u64 v1, v[2:3] offset:65535 gds ; encoding: [0xff,0xff,0x87,0xd8,0x01,0x02,0x00,…
|
| D | gfx9_dasm_all.txt | 1170 # CHECK: ds_inc_u64 v1, v[2:3] offset:65535 ; encoding: [0xff,0xff,0x86,0xd8,0x01,0x02,0x00,0x00]
1173 # CHECK: ds_inc_u64 v255, v[2:3] offset:65535 ; encoding: [0xff,0xff,0x86,0xd8,0xff,0x02,0x00,0x…
1176 # CHECK: ds_inc_u64 v1, v[254:255] offset:65535 ; encoding: [0xff,0xff,0x86,0xd8,0x01,0xfe,0x00,…
1179 # CHECK: ds_inc_u64 v1, v[2:3] ; encoding: [0x00,0x00,0x86,0xd8,0x01,0x02,0x00,0x00]
1182 # CHECK: ds_inc_u64 v1, v[2:3] offset:4 ; encoding: [0x04,0x00,0x86,0xd8,0x01,0x02,0x00,0x00]
1185 # CHECK: ds_inc_u64 v1, v[2:3] offset:65535 gds ; encoding: [0xff,0xff,0x87,0xd8,0x01,0x02,0x00,…
|
| /external/llvm/test/MC/Disassembler/AMDGPU/ |
| D | ds_vi.txt | 207 # VI: ds_inc_u64 v2, v[4:5] ; encoding: [0x00,0x00,0x86,0xd8,0x02,0x04,0x00,0x00]
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstructions.td | 846 defm DS_INC_U64 : DS_1A1D_NORET <0x43, "ds_inc_u64", VReg_64>;
869 defm DS_INC_RTN_U64 : DS_1A1D_RET <0x63, "ds_inc_rtn_u64", VReg_64, "ds_inc_u64">;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
| D | AMDGPUAsmGFX7.rst | 61 …ds_inc_u64 src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
|
| D | AMDGPUAsmGFX8.rst | 65 …ds_inc_u64 src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
|
| D | AMDGPUAsmGFX9.rst | 65 …ds_inc_u64 src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
|