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Searched refs:ds_max_rtn_f32 (Results 1 – 15 of 15) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dlds_atomic_f32.ll54 ; GCN: ds_max_rtn_f32 [[V2:v[0-9]+]], [[V1:v[0-9]+]], [[V0]] offset:32
57 ; GCN: ds_max_rtn_f32 {{v[0-9]+}}, {{v[0-9]+}}, [[V2]]
/external/llvm/test/MC/AMDGPU/
Dds.s237 ds_max_rtn_f32 v8, v2, v4, v6 label
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/
Dds.s274 ds_max_rtn_f32 v8, v2, v4 label
Dgfx7_asm_all.s1071 ds_max_rtn_f32 v5, v1, v2 offset:65535 label
1074 ds_max_rtn_f32 v255, v1, v2 offset:65535 label
1077 ds_max_rtn_f32 v5, v255, v2 offset:65535 label
1080 ds_max_rtn_f32 v5, v1, v255 offset:65535 label
1083 ds_max_rtn_f32 v5, v1, v2 label
1086 ds_max_rtn_f32 v5, v1, v2 offset:0 label
1089 ds_max_rtn_f32 v5, v1, v2 offset:4 label
1092 ds_max_rtn_f32 v5, v1, v2 offset:65535 gds label
Dgfx8_asm_all.s1011 ds_max_rtn_f32 v5, v1, v2 offset:65535 label
1014 ds_max_rtn_f32 v255, v1, v2 offset:65535 label
1017 ds_max_rtn_f32 v5, v255, v2 offset:65535 label
1020 ds_max_rtn_f32 v5, v1, v255 offset:65535 label
1023 ds_max_rtn_f32 v5, v1, v2 label
1026 ds_max_rtn_f32 v5, v1, v2 offset:0 label
1029 ds_max_rtn_f32 v5, v1, v2 offset:4 label
1032 ds_max_rtn_f32 v5, v1, v2 offset:65535 gds label
Dgfx9_asm_all.s1012 ds_max_rtn_f32 v5, v1, v2 offset:65535 label
1015 ds_max_rtn_f32 v255, v1, v2 offset:65535 label
1018 ds_max_rtn_f32 v5, v255, v2 offset:65535 label
1021 ds_max_rtn_f32 v5, v1, v255 offset:65535 label
1024 ds_max_rtn_f32 v5, v1, v2 label
1027 ds_max_rtn_f32 v5, v1, v2 offset:0 label
1030 ds_max_rtn_f32 v5, v1, v2 offset:4 label
1033 ds_max_rtn_f32 v5, v1, v2 offset:65535 gds label
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/
Dds_vi.txt168 # VI: ds_max_rtn_f32 v8, v2, v4 ; encoding: [0x00,0x00,0x66,0xd8,0x02,0x04,0x00,0x08]
Dgfx8_dasm_all.txt873 # CHECK: ds_max_rtn_f32 v5, v1, v2 offset:65535 ; encoding: [0xff,0xff,0x66,0xd8,0x01,0x02,0x00,…
876 # CHECK: ds_max_rtn_f32 v255, v1, v2 offset:65535 ; encoding: [0xff,0xff,0x66,0xd8,0x01,0x02,0x0…
879 # CHECK: ds_max_rtn_f32 v5, v255, v2 offset:65535 ; encoding: [0xff,0xff,0x66,0xd8,0xff,0x02,0x0…
882 # CHECK: ds_max_rtn_f32 v5, v1, v255 offset:65535 ; encoding: [0xff,0xff,0x66,0xd8,0x01,0xff,0x0…
885 # CHECK: ds_max_rtn_f32 v5, v1, v2 ; encoding: [0x00,0x00,0x66,0xd8,0x01,0x02,0x00,0x05]
888 # CHECK: ds_max_rtn_f32 v5, v1, v2 offset:4 ; encoding: [0x04,0x00,0x66,0xd8,0x01,0x02,0x00,0x05]
891 # CHECK: ds_max_rtn_f32 v5, v1, v2 offset:65535 gds ; encoding: [0xff,0xff,0x67,0xd8,0x01,0x02,0…
Dgfx9_dasm_all.txt873 # CHECK: ds_max_rtn_f32 v5, v1, v2 offset:65535 ; encoding: [0xff,0xff,0x66,0xd8,0x01,0x02,0x00,…
876 # CHECK: ds_max_rtn_f32 v255, v1, v2 offset:65535 ; encoding: [0xff,0xff,0x66,0xd8,0x01,0x02,0x0…
879 # CHECK: ds_max_rtn_f32 v5, v255, v2 offset:65535 ; encoding: [0xff,0xff,0x66,0xd8,0xff,0x02,0x0…
882 # CHECK: ds_max_rtn_f32 v5, v1, v255 offset:65535 ; encoding: [0xff,0xff,0x66,0xd8,0x01,0xff,0x0…
885 # CHECK: ds_max_rtn_f32 v5, v1, v2 ; encoding: [0x00,0x00,0x66,0xd8,0x01,0x02,0x00,0x05]
888 # CHECK: ds_max_rtn_f32 v5, v1, v2 offset:4 ; encoding: [0x04,0x00,0x66,0xd8,0x01,0x02,0x00,0x05]
891 # CHECK: ds_max_rtn_f32 v5, v1, v2 offset:65535 gds ; encoding: [0xff,0xff,0x67,0xd8,0x01,0x02,0…
/external/llvm/test/MC/Disassembler/AMDGPU/
Dds_vi.txt162 # VI: ds_max_rtn_f32 v8, v2, v4, v6 ; encoding: [0x00,0x00,0x66,0xd8,0x02,0x04,0x06,0x08]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DDSInstructions.td444 defm DS_MAX_RTN_F32 : DS_1A1D_RET_mc<"ds_max_rtn_f32", VGPR_32, "ds_max_f32">;
/external/swiftshader/third_party/llvm-7.0/llvm/docs/
DAMDGPUAsmGFX7.rst66 …ds_max_rtn_f32 dst, src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
DAMDGPUAsmGFX8.rst70 …ds_max_rtn_f32 dst, src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
DAMDGPUAsmGFX9.rst70 …ds_max_rtn_f32 dst, src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
/external/llvm/lib/Target/AMDGPU/
DSIInstructions.td825 defm DS_MAX_RTN_F32 : DS_1A2D_RET <0x33, "ds_max_rtn_f32", VGPR_32, "ds_max_f32">;