/external/llvm/test/MC/AMDGPU/ |
D | ds.s | 85 ds_max_u32 v2, v4 label
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/ |
D | ds.s | 102 ds_max_u32 v2, v4 label
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D | gfx7_asm_all.s | 171 ds_max_u32 v1, v2 offset:65535 label 174 ds_max_u32 v255, v2 offset:65535 label 177 ds_max_u32 v1, v255 offset:65535 label 180 ds_max_u32 v1, v2 label 183 ds_max_u32 v1, v2 offset:0 label 186 ds_max_u32 v1, v2 offset:4 label 189 ds_max_u32 v1, v2 offset:65535 gds label
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D | gfx8_asm_all.s | 171 ds_max_u32 v1, v2 offset:65535 label 174 ds_max_u32 v255, v2 offset:65535 label 177 ds_max_u32 v1, v255 offset:65535 label 180 ds_max_u32 v1, v2 label 183 ds_max_u32 v1, v2 offset:0 label 186 ds_max_u32 v1, v2 offset:4 label 189 ds_max_u32 v1, v2 offset:65535 gds label
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D | gfx9_asm_all.s | 172 ds_max_u32 v1, v2 offset:65535 label 175 ds_max_u32 v255, v2 offset:65535 label 178 ds_max_u32 v1, v255 offset:65535 label 181 ds_max_u32 v1, v2 label 184 ds_max_u32 v1, v2 offset:0 label 187 ds_max_u32 v1, v2 offset:4 label 190 ds_max_u32 v1, v2 offset:65535 gds label
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/external/llvm/test/CodeGen/AMDGPU/ |
D | local-atomics.ll | 536 ; GCN: ds_max_u32 544 ; GCN: ds_max_u32 v{{[0-9]+}}, v{{[0-9]+}} offset:16
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
D | local-atomics.ll | 699 ; GCN: ds_max_u32 710 ; GCN: ds_max_u32 v{{[0-9]+}}, v{{[0-9]+}} offset:16
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | DSInstructions.td | 370 defm DS_MAX_U32 : DS_1A1D_NORET_mc<"ds_max_u32">; 436 defm DS_MAX_RTN_U32 : DS_1A1D_RET_mc<"ds_max_rtn_u32", VGPR_32, "ds_max_u32">;
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/ |
D | ds_vi.txt | 48 # VI: ds_max_u32 v2, v4 ; encoding: [0x00,0x00,0x10,0xd8,0x02,0x04,0x00,0x00]
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D | gfx8_dasm_all.txt | 147 # CHECK: ds_max_u32 v1, v2 offset:65535 ; encoding: [0xff,0xff,0x10,0xd8,0x01,0x02,0x00,0x00] 150 # CHECK: ds_max_u32 v255, v2 offset:65535 ; encoding: [0xff,0xff,0x10,0xd8,0xff,0x02,0x00,0x00] 153 # CHECK: ds_max_u32 v1, v255 offset:65535 ; encoding: [0xff,0xff,0x10,0xd8,0x01,0xff,0x00,0x00] 156 # CHECK: ds_max_u32 v1, v2 ; encoding: [0x00,0x00,0x10,0xd8,0x01,0x02,0x00,0x00] 159 # CHECK: ds_max_u32 v1, v2 offset:4 ; encoding: [0x04,0x00,0x10,0xd8,0x01,0x02,0x00,0x00] 162 # CHECK: ds_max_u32 v1, v2 offset:65535 gds ; encoding: [0xff,0xff,0x11,0xd8,0x01,0x02,0x00,0x00]
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D | gfx9_dasm_all.txt | 147 # CHECK: ds_max_u32 v1, v2 offset:65535 ; encoding: [0xff,0xff,0x10,0xd8,0x01,0x02,0x00,0x00] 150 # CHECK: ds_max_u32 v255, v2 offset:65535 ; encoding: [0xff,0xff,0x10,0xd8,0xff,0x02,0x00,0x00] 153 # CHECK: ds_max_u32 v1, v255 offset:65535 ; encoding: [0xff,0xff,0x10,0xd8,0x01,0xff,0x00,0x00] 156 # CHECK: ds_max_u32 v1, v2 ; encoding: [0x00,0x00,0x10,0xd8,0x01,0x02,0x00,0x00] 159 # CHECK: ds_max_u32 v1, v2 offset:4 ; encoding: [0x04,0x00,0x10,0xd8,0x01,0x02,0x00,0x00] 162 # CHECK: ds_max_u32 v1, v2 offset:65535 gds ; encoding: [0xff,0xff,0x11,0xd8,0x01,0x02,0x00,0x00]
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/external/llvm/test/MC/Disassembler/AMDGPU/ |
D | ds_vi.txt | 48 # VI: ds_max_u32 v2, v4 ; encoding: [0x00,0x00,0x10,0xd8,0x02,0x04,0x00,0x00]
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/external/llvm/lib/Target/AMDGPU/ |
D | SIInstructions.td | 778 defm DS_MAX_U32 : DS_1A1D_NORET <0x8, "ds_max_u32", VGPR_32>; 810 defm DS_MAX_RTN_U32 : DS_1A1D_RET <0x28, "ds_max_rtn_u32", VGPR_32, "ds_max_u32">;
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/external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
D | AMDGPUAsmGFX7.rst | 78 …ds_max_u32 src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
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D | AMDGPUAsmGFX8.rst | 82 …ds_max_u32 src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
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D | AMDGPUAsmGFX9.rst | 82 …ds_max_u32 src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
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