/external/llvm/test/MC/AMDGPU/ |
D | ds.s | 125 ds_min_f32 v2, v4, v6 label
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
D | lds_atomic_f32.ll | 34 ; GCN: ds_min_f32 [[V3:v[0-9]+]], [[V0]] offset:64
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/ |
D | ds.s | 142 ds_min_f32 v2, v4 label
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D | gfx7_asm_all.s | 414 ds_min_f32 v1, v2 offset:65535 label 417 ds_min_f32 v255, v2 offset:65535 label 420 ds_min_f32 v1, v255 offset:65535 label 423 ds_min_f32 v1, v2 label 426 ds_min_f32 v1, v2 offset:0 label 429 ds_min_f32 v1, v2 offset:4 label 432 ds_min_f32 v1, v2 offset:65535 gds label
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D | gfx8_asm_all.s | 414 ds_min_f32 v1, v2 offset:65535 label 417 ds_min_f32 v255, v2 offset:65535 label 420 ds_min_f32 v1, v255 offset:65535 label 423 ds_min_f32 v1, v2 label 426 ds_min_f32 v1, v2 offset:0 label 429 ds_min_f32 v1, v2 offset:4 label 432 ds_min_f32 v1, v2 offset:65535 gds label
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D | gfx9_asm_all.s | 415 ds_min_f32 v1, v2 offset:65535 label 418 ds_min_f32 v255, v2 offset:65535 label 421 ds_min_f32 v1, v255 offset:65535 label 424 ds_min_f32 v1, v2 label 427 ds_min_f32 v1, v2 offset:0 label 430 ds_min_f32 v1, v2 offset:4 label 433 ds_min_f32 v1, v2 offset:65535 gds label
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | DSInstructions.td | 375 defm DS_MIN_F32 : DS_1A1D_NORET_mc<"ds_min_f32">; 443 defm DS_MIN_RTN_F32 : DS_1A1D_RET_mc<"ds_min_rtn_f32", VGPR_32, "ds_min_f32">;
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/ |
D | ds_vi.txt | 78 # VI: ds_min_f32 v2, v4 ; encoding: [0x00,0x00,0x24,0xd8,0x02,0x04,0x00,0x00]
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D | gfx8_dasm_all.txt | 354 # CHECK: ds_min_f32 v1, v2 offset:65535 ; encoding: [0xff,0xff,0x24,0xd8,0x01,0x02,0x00,0x00] 357 # CHECK: ds_min_f32 v255, v2 offset:65535 ; encoding: [0xff,0xff,0x24,0xd8,0xff,0x02,0x00,0x00] 360 # CHECK: ds_min_f32 v1, v255 offset:65535 ; encoding: [0xff,0xff,0x24,0xd8,0x01,0xff,0x00,0x00] 363 # CHECK: ds_min_f32 v1, v2 ; encoding: [0x00,0x00,0x24,0xd8,0x01,0x02,0x00,0x00] 366 # CHECK: ds_min_f32 v1, v2 offset:4 ; encoding: [0x04,0x00,0x24,0xd8,0x01,0x02,0x00,0x00] 369 # CHECK: ds_min_f32 v1, v2 offset:65535 gds ; encoding: [0xff,0xff,0x25,0xd8,0x01,0x02,0x00,0x00]
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D | gfx9_dasm_all.txt | 354 # CHECK: ds_min_f32 v1, v2 offset:65535 ; encoding: [0xff,0xff,0x24,0xd8,0x01,0x02,0x00,0x00] 357 # CHECK: ds_min_f32 v255, v2 offset:65535 ; encoding: [0xff,0xff,0x24,0xd8,0xff,0x02,0x00,0x00] 360 # CHECK: ds_min_f32 v1, v255 offset:65535 ; encoding: [0xff,0xff,0x24,0xd8,0x01,0xff,0x00,0x00] 363 # CHECK: ds_min_f32 v1, v2 ; encoding: [0x00,0x00,0x24,0xd8,0x01,0x02,0x00,0x00] 366 # CHECK: ds_min_f32 v1, v2 offset:4 ; encoding: [0x04,0x00,0x24,0xd8,0x01,0x02,0x00,0x00] 369 # CHECK: ds_min_f32 v1, v2 offset:65535 gds ; encoding: [0xff,0xff,0x25,0xd8,0x01,0x02,0x00,0x00]
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/external/llvm/test/MC/Disassembler/AMDGPU/ |
D | ds_vi.txt | 78 # VI: ds_min_f32 v2, v4, v6 ; encoding: [0x00,0x00,0x24,0xd8,0x02,0x04,0x06,0x00]
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/external/llvm/lib/Target/AMDGPU/ |
D | SIInstructions.td | 790 defm DS_MIN_F32 : DS_1A2D_NORET <0x12, "ds_min_f32", VGPR_32>; 824 defm DS_MIN_RTN_F32 : DS_1A2D_RET <0x32, "ds_min_rtn_f32", VGPR_32, "ds_min_f32">;
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/external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
D | AMDGPUAsmGFX7.rst | 80 …ds_min_f32 src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
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D | AMDGPUAsmGFX8.rst | 84 …ds_min_f32 src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
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D | AMDGPUAsmGFX9.rst | 84 …ds_min_f32 src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
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