| /external/llvm/test/MC/AMDGPU/ |
| D | ds.s | 73 ds_min_i32 v2, v4 label
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/ |
| D | ds.s | 90 ds_min_i32 v2, v4 label
|
| D | gfx7_asm_all.s | 108 ds_min_i32 v1, v2 offset:65535 label
111 ds_min_i32 v255, v2 offset:65535 label
114 ds_min_i32 v1, v255 offset:65535 label
117 ds_min_i32 v1, v2 label
120 ds_min_i32 v1, v2 offset:0 label
123 ds_min_i32 v1, v2 offset:4 label
126 ds_min_i32 v1, v2 offset:65535 gds label
|
| D | gfx8_asm_all.s | 108 ds_min_i32 v1, v2 offset:65535 label
111 ds_min_i32 v255, v2 offset:65535 label
114 ds_min_i32 v1, v255 offset:65535 label
117 ds_min_i32 v1, v2 label
120 ds_min_i32 v1, v2 offset:0 label
123 ds_min_i32 v1, v2 offset:4 label
126 ds_min_i32 v1, v2 offset:65535 gds label
|
| D | gfx9_asm_all.s | 109 ds_min_i32 v1, v2 offset:65535 label
112 ds_min_i32 v255, v2 offset:65535 label
115 ds_min_i32 v1, v255 offset:65535 label
118 ds_min_i32 v1, v2 label
121 ds_min_i32 v1, v2 offset:0 label
124 ds_min_i32 v1, v2 offset:4 label
127 ds_min_i32 v1, v2 offset:65535 gds label
|
| /external/llvm/test/CodeGen/AMDGPU/ |
| D | local-atomics.ll | 485 ; GCN: ds_min_i32
493 ; GCN: ds_min_i32 v{{[0-9]+}}, v{{[0-9]+}} offset:16
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
| D | local-atomics.ll | 630 ; GCN: ds_min_i32
641 ; GCN: ds_min_i32 v{{[0-9]+}}, v{{[0-9]+}} offset:16
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | DSInstructions.td | 367 defm DS_MIN_I32 : DS_1A1D_NORET_mc<"ds_min_i32">;
433 defm DS_MIN_RTN_I32 : DS_1A1D_RET_mc<"ds_min_rtn_i32", VGPR_32, "ds_min_i32">;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/ |
| D | ds_vi.txt | 39 # VI: ds_min_i32 v2, v4 ; encoding: [0x00,0x00,0x0a,0xd8,0x02,0x04,0x00,0x00]
|
| D | gfx8_dasm_all.txt | 93 # CHECK: ds_min_i32 v1, v2 offset:65535 ; encoding: [0xff,0xff,0x0a,0xd8,0x01,0x02,0x00,0x00]
96 # CHECK: ds_min_i32 v255, v2 offset:65535 ; encoding: [0xff,0xff,0x0a,0xd8,0xff,0x02,0x00,0x00]
99 # CHECK: ds_min_i32 v1, v255 offset:65535 ; encoding: [0xff,0xff,0x0a,0xd8,0x01,0xff,0x00,0x00]
102 # CHECK: ds_min_i32 v1, v2 ; encoding: [0x00,0x00,0x0a,0xd8,0x01,0x02,0x00,0x00]
105 # CHECK: ds_min_i32 v1, v2 offset:4 ; encoding: [0x04,0x00,0x0a,0xd8,0x01,0x02,0x00,0x00]
108 # CHECK: ds_min_i32 v1, v2 offset:65535 gds ; encoding: [0xff,0xff,0x0b,0xd8,0x01,0x02,0x00,0x00]
|
| D | gfx9_dasm_all.txt | 93 # CHECK: ds_min_i32 v1, v2 offset:65535 ; encoding: [0xff,0xff,0x0a,0xd8,0x01,0x02,0x00,0x00]
96 # CHECK: ds_min_i32 v255, v2 offset:65535 ; encoding: [0xff,0xff,0x0a,0xd8,0xff,0x02,0x00,0x00]
99 # CHECK: ds_min_i32 v1, v255 offset:65535 ; encoding: [0xff,0xff,0x0a,0xd8,0x01,0xff,0x00,0x00]
102 # CHECK: ds_min_i32 v1, v2 ; encoding: [0x00,0x00,0x0a,0xd8,0x01,0x02,0x00,0x00]
105 # CHECK: ds_min_i32 v1, v2 offset:4 ; encoding: [0x04,0x00,0x0a,0xd8,0x01,0x02,0x00,0x00]
108 # CHECK: ds_min_i32 v1, v2 offset:65535 gds ; encoding: [0xff,0xff,0x0b,0xd8,0x01,0x02,0x00,0x00]
|
| /external/llvm/test/MC/Disassembler/AMDGPU/ |
| D | ds_vi.txt | 39 # VI: ds_min_i32 v2, v4 ; encoding: [0x00,0x00,0x0a,0xd8,0x02,0x04,0x00,0x00]
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstructions.td | 775 defm DS_MIN_I32 : DS_1A1D_NORET <0x5, "ds_min_i32", VGPR_32>;
807 defm DS_MIN_RTN_I32 : DS_1A1D_RET <0x25, "ds_min_rtn_i32", VGPR_32, "ds_min_i32">;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
| D | AMDGPUAsmGFX7.rst | 82 …ds_min_i32 src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
|
| D | AMDGPUAsmGFX8.rst | 86 …ds_min_i32 src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
|
| D | AMDGPUAsmGFX9.rst | 86 …ds_min_i32 src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
|