/external/llvm/test/MC/AMDGPU/ |
D | ds.s | 437 ds_min_rtn_f64 v[8:9], v2, v[4:5] label
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/ |
D | ds.s | 479 ds_min_rtn_f64 v[8:9], v2, v[4:5] label
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D | gfx7_asm_all.s | 2280 ds_min_rtn_f64 v[5:6], v1, v[2:3] offset:65535 label 2283 ds_min_rtn_f64 v[254:255], v1, v[2:3] offset:65535 label 2286 ds_min_rtn_f64 v[5:6], v255, v[2:3] offset:65535 label 2289 ds_min_rtn_f64 v[5:6], v1, v[254:255] offset:65535 label 2292 ds_min_rtn_f64 v[5:6], v1, v[2:3] label 2295 ds_min_rtn_f64 v[5:6], v1, v[2:3] offset:0 label 2298 ds_min_rtn_f64 v[5:6], v1, v[2:3] offset:4 label 2301 ds_min_rtn_f64 v[5:6], v1, v[2:3] offset:65535 gds label
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D | gfx8_asm_all.s | 2232 ds_min_rtn_f64 v[5:6], v1, v[2:3] offset:65535 label 2235 ds_min_rtn_f64 v[254:255], v1, v[2:3] offset:65535 label 2238 ds_min_rtn_f64 v[5:6], v255, v[2:3] offset:65535 label 2241 ds_min_rtn_f64 v[5:6], v1, v[254:255] offset:65535 label 2244 ds_min_rtn_f64 v[5:6], v1, v[2:3] label 2247 ds_min_rtn_f64 v[5:6], v1, v[2:3] offset:0 label 2250 ds_min_rtn_f64 v[5:6], v1, v[2:3] offset:4 label 2253 ds_min_rtn_f64 v[5:6], v1, v[2:3] offset:65535 gds label
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D | gfx9_asm_all.s | 2401 ds_min_rtn_f64 v[5:6], v1, v[2:3] offset:65535 label 2404 ds_min_rtn_f64 v[254:255], v1, v[2:3] offset:65535 label 2407 ds_min_rtn_f64 v[5:6], v255, v[2:3] offset:65535 label 2410 ds_min_rtn_f64 v[5:6], v1, v[254:255] offset:65535 label 2413 ds_min_rtn_f64 v[5:6], v1, v[2:3] label 2416 ds_min_rtn_f64 v[5:6], v1, v[2:3] offset:0 label 2419 ds_min_rtn_f64 v[5:6], v1, v[2:3] offset:4 label 2422 ds_min_rtn_f64 v[5:6], v1, v[2:3] offset:65535 gds label
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/ |
D | ds_vi.txt | 312 # VI: ds_min_rtn_f64 v[8:9], v2, v[4:5] ; encoding: [0x00,0x00,0xe4,0xd8,0x02,0x04,0x00,0x08]
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D | gfx8_dasm_all.txt | 1908 # CHECK: ds_min_rtn_f64 v[5:6], v1, v[2:3] offset:65535 ; encoding: [0xff,0xff,0xe4,0xd8,0x01,0x… 1911 # CHECK: ds_min_rtn_f64 v[254:255], v1, v[2:3] offset:65535 ; encoding: [0xff,0xff,0xe4,0xd8,0x0… 1914 # CHECK: ds_min_rtn_f64 v[5:6], v255, v[2:3] offset:65535 ; encoding: [0xff,0xff,0xe4,0xd8,0xff,… 1917 # CHECK: ds_min_rtn_f64 v[5:6], v1, v[254:255] offset:65535 ; encoding: [0xff,0xff,0xe4,0xd8,0x0… 1920 # CHECK: ds_min_rtn_f64 v[5:6], v1, v[2:3] ; encoding: [0x00,0x00,0xe4,0xd8,0x01,0x02,0x00,0x05] 1923 # CHECK: ds_min_rtn_f64 v[5:6], v1, v[2:3] offset:4 ; encoding: [0x04,0x00,0xe4,0xd8,0x01,0x02,0… 1926 # CHECK: ds_min_rtn_f64 v[5:6], v1, v[2:3] offset:65535 gds ; encoding: [0xff,0xff,0xe5,0xd8,0x0…
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D | gfx9_dasm_all.txt | 2052 # CHECK: ds_min_rtn_f64 v[5:6], v1, v[2:3] offset:65535 ; encoding: [0xff,0xff,0xe4,0xd8,0x01,0x… 2055 # CHECK: ds_min_rtn_f64 v[254:255], v1, v[2:3] offset:65535 ; encoding: [0xff,0xff,0xe4,0xd8,0x0… 2058 # CHECK: ds_min_rtn_f64 v[5:6], v255, v[2:3] offset:65535 ; encoding: [0xff,0xff,0xe4,0xd8,0xff,… 2061 # CHECK: ds_min_rtn_f64 v[5:6], v1, v[254:255] offset:65535 ; encoding: [0xff,0xff,0xe4,0xd8,0x0… 2064 # CHECK: ds_min_rtn_f64 v[5:6], v1, v[2:3] ; encoding: [0x00,0x00,0xe4,0xd8,0x01,0x02,0x00,0x05] 2067 # CHECK: ds_min_rtn_f64 v[5:6], v1, v[2:3] offset:4 ; encoding: [0x04,0x00,0xe4,0xd8,0x01,0x02,0… 2070 # CHECK: ds_min_rtn_f64 v[5:6], v1, v[2:3] offset:65535 gds ; encoding: [0xff,0xff,0xe5,0xd8,0x0…
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/external/llvm/test/MC/Disassembler/AMDGPU/ |
D | ds_vi.txt | 312 # VI: ds_min_rtn_f64 v[8:9], v2, v[4:5] ; encoding: [0x00,0x00,0xe4,0xd8,0x02,0x04,0x00,0x08]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | DSInstructions.td | 465 defm DS_MIN_RTN_F64 : DS_1A1D_RET_mc<"ds_min_rtn_f64", VReg_64, "ds_min_f64">;
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/external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
D | AMDGPUAsmGFX7.rst | 85 …ds_min_rtn_f64 dst, src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
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D | AMDGPUAsmGFX8.rst | 89 …ds_min_rtn_f64 dst, src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
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D | AMDGPUUsage.rst | 4141 ds_min_rtn_f64 v[8:9], v2, v[4:5]
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D | AMDGPUAsmGFX9.rst | 89 …ds_min_rtn_f64 dst, src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
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/external/llvm/lib/Target/AMDGPU/ |
D | SIInstructions.td | 884 defm DS_MIN_RTN_F64 : DS_1A1D_RET <0x72, "ds_min_rtn_f64", VReg_64, "ds_min_f64">;
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