/external/llvm/test/MC/AMDGPU/ |
D | ds.s | 97 ds_xor_b32 v2, v4 label
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/ |
D | ds.s | 114 ds_xor_b32 v2, v4 label
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D | gfx7_asm_all.s | 234 ds_xor_b32 v1, v2 offset:65535 label 237 ds_xor_b32 v255, v2 offset:65535 label 240 ds_xor_b32 v1, v255 offset:65535 label 243 ds_xor_b32 v1, v2 label 246 ds_xor_b32 v1, v2 offset:0 label 249 ds_xor_b32 v1, v2 offset:4 label 252 ds_xor_b32 v1, v2 offset:65535 gds label
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D | gfx8_asm_all.s | 234 ds_xor_b32 v1, v2 offset:65535 label 237 ds_xor_b32 v255, v2 offset:65535 label 240 ds_xor_b32 v1, v255 offset:65535 label 243 ds_xor_b32 v1, v2 label 246 ds_xor_b32 v1, v2 offset:0 label 249 ds_xor_b32 v1, v2 offset:4 label 252 ds_xor_b32 v1, v2 offset:65535 gds label
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D | gfx9_asm_all.s | 235 ds_xor_b32 v1, v2 offset:65535 label 238 ds_xor_b32 v255, v2 offset:65535 label 241 ds_xor_b32 v1, v255 offset:65535 label 244 ds_xor_b32 v1, v2 label 247 ds_xor_b32 v1, v2 offset:0 label 250 ds_xor_b32 v1, v2 offset:4 label 253 ds_xor_b32 v1, v2 offset:65535 gds label
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/external/llvm/test/CodeGen/AMDGPU/ |
D | local-atomics.ll | 461 ; GCN: ds_xor_b32 469 ; GCN: ds_xor_b32 v{{[0-9]+}}, v{{[0-9]+}} offset:16
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
D | local-atomics.ll | 600 ; GCN: ds_xor_b32 611 ; GCN: ds_xor_b32 v{{[0-9]+}}, v{{[0-9]+}} offset:16
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | DSInstructions.td | 373 defm DS_XOR_B32 : DS_1A1D_NORET_mc<"ds_xor_b32">; 439 defm DS_XOR_RTN_B32 : DS_1A1D_RET_mc<"ds_xor_rtn_b32", VGPR_32, "ds_xor_b32">;
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/ |
D | ds_vi.txt | 57 # VI: ds_xor_b32 v2, v4 ; encoding: [0x00,0x00,0x16,0xd8,0x02,0x04,0x00,0x00]
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D | gfx8_dasm_all.txt | 201 # CHECK: ds_xor_b32 v1, v2 offset:65535 ; encoding: [0xff,0xff,0x16,0xd8,0x01,0x02,0x00,0x00] 204 # CHECK: ds_xor_b32 v255, v2 offset:65535 ; encoding: [0xff,0xff,0x16,0xd8,0xff,0x02,0x00,0x00] 207 # CHECK: ds_xor_b32 v1, v255 offset:65535 ; encoding: [0xff,0xff,0x16,0xd8,0x01,0xff,0x00,0x00] 210 # CHECK: ds_xor_b32 v1, v2 ; encoding: [0x00,0x00,0x16,0xd8,0x01,0x02,0x00,0x00] 213 # CHECK: ds_xor_b32 v1, v2 offset:4 ; encoding: [0x04,0x00,0x16,0xd8,0x01,0x02,0x00,0x00] 216 # CHECK: ds_xor_b32 v1, v2 offset:65535 gds ; encoding: [0xff,0xff,0x17,0xd8,0x01,0x02,0x00,0x00]
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D | gfx9_dasm_all.txt | 201 # CHECK: ds_xor_b32 v1, v2 offset:65535 ; encoding: [0xff,0xff,0x16,0xd8,0x01,0x02,0x00,0x00] 204 # CHECK: ds_xor_b32 v255, v2 offset:65535 ; encoding: [0xff,0xff,0x16,0xd8,0xff,0x02,0x00,0x00] 207 # CHECK: ds_xor_b32 v1, v255 offset:65535 ; encoding: [0xff,0xff,0x16,0xd8,0x01,0xff,0x00,0x00] 210 # CHECK: ds_xor_b32 v1, v2 ; encoding: [0x00,0x00,0x16,0xd8,0x01,0x02,0x00,0x00] 213 # CHECK: ds_xor_b32 v1, v2 offset:4 ; encoding: [0x04,0x00,0x16,0xd8,0x01,0x02,0x00,0x00] 216 # CHECK: ds_xor_b32 v1, v2 offset:65535 gds ; encoding: [0xff,0xff,0x17,0xd8,0x01,0x02,0x00,0x00]
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/external/llvm/test/MC/Disassembler/AMDGPU/ |
D | ds_vi.txt | 57 # VI: ds_xor_b32 v2, v4 ; encoding: [0x00,0x00,0x16,0xd8,0x02,0x04,0x00,0x00]
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/external/llvm/lib/Target/AMDGPU/ |
D | SIInstructions.td | 781 defm DS_XOR_B32 : DS_1A1D_NORET <0xb, "ds_xor_b32", VGPR_32>; 813 defm DS_XOR_RTN_B32 : DS_1A1D_RET <0x2b, "ds_xor_rtn_b32", VGPR_32, "ds_xor_b32">;
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/external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
D | AMDGPUAsmGFX7.rst | 154 …ds_xor_b32 src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
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D | AMDGPUAsmGFX8.rst | 159 …ds_xor_b32 src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
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D | AMDGPUAsmGFX9.rst | 167 …ds_xor_b32 src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
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