Searched refs:dsbh (Results 1 – 25 of 41) sorted by relevance
12
| /external/llvm/test/MC/Mips/mips32r3/ |
| D | invalid-mips64r2.s | 8 …dsbh $v1,$t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not curr…
|
| /external/llvm/test/MC/Mips/mips32r5/ |
| D | invalid-mips64r2.s | 8 …dsbh $v1,$t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not curr…
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r2/ |
| D | invalid-mips64r2.s | 8 …dsbh $v1,$t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not curr…
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r3/ |
| D | invalid-mips64r2.s | 8 …dsbh $v1,$t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not curr…
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r5/ |
| D | invalid-mips64r2.s | 8 …dsbh $v1,$t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not curr…
|
| /external/llvm/test/MC/Mips/mips32r2/ |
| D | invalid-mips64r2.s | 8 …dsbh $v1,$t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not curr…
|
| /external/llvm/test/MC/Mips/mips4/ |
| D | invalid-mips64r2.s | 14 …dsbh $v1,$t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64/ |
| D | invalid-mips64r2.s | 20 …dsbh $v1,$14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| /external/llvm/test/MC/Mips/mips64/ |
| D | invalid-mips64r2.s | 20 …dsbh $v1,$14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips4/ |
| D | invalid-mips64r2.s | 14 …dsbh $v1,$t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips5/ |
| D | invalid-mips64r2.s | 19 …dsbh $v1,$14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| /external/llvm/test/MC/Mips/mips5/ |
| D | invalid-mips64r2.s | 19 …dsbh $v1,$14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| /external/llvm/test/CodeGen/Mips/ |
| D | bswap.ll | 41 ; MIPS64: dsbh $[[R0:[0-9]+]]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/ |
| D | bswap.ll | 52 ; MIPS64: dsbh $[[R0:[0-9]+]]
|
| /external/llvm/lib/Target/Mips/ |
| D | MicroMips64r6InstrInfo.td | 50 class DSBH_MM64R6_ENC : POOL32S_2R_FM_MMR6<"dsbh", 0b0111101100>;
221 class DSBH_MM64R6_DESC : DSBH_DSHD_DESC_BASE<"dsbh", GPR64Opnd>;
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r2/ |
| D | valid-mips64r2-el.txt | 116 0xa4 0x18 0x0e 0x7c # CHECK: dsbh $3, $14
270 0xa4 0x38 0x1c 0x7c # CHECK: dsbh $7, $gp
|
| D | valid-mips64r2.txt | 418 0x7c 0x0e 0x18 0xa4 # CHECK: dsbh $3, $14
420 0x7c 0x1c 0x38 0xa4 # CHECK: dsbh $7, $gp
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64r2/ |
| D | valid-mips64r2-el.txt | 117 0xa4 0x18 0x0e 0x7c # CHECK: dsbh $3, $14
275 0xa4 0x38 0x1c 0x7c # CHECK: dsbh $7, $gp
|
| D | valid-mips64r2.txt | 423 0x7c 0x0e 0x18 0xa4 # CHECK: dsbh $3, $14
425 0x7c 0x1c 0x38 0xa4 # CHECK: dsbh $7, $gp
|
| /external/llvm/test/MC/Mips/micromips64r6/ |
| D | valid.s | 272 dsbh $3, $4 # CHECK: dsbh $3, $4 # encoding: [0x58,0x64,0x7b,0x3c]
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r5/ |
| D | valid-mips64r5.txt | 416 0x7c 0x0e 0x18 0xa4 # CHECK: dsbh $3, $14
418 0x7c 0x1c 0x38 0xa4 # CHECK: dsbh $7, $gp
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64r5/ |
| D | valid-mips64r5.txt | 421 0x7c 0x0e 0x18 0xa4 # CHECK: dsbh $3, $14
423 0x7c 0x1c 0x38 0xa4 # CHECK: dsbh $7, $gp
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64r3/ |
| D | valid-mips64r3.txt | 421 0x7c 0x0e 0x18 0xa4 # CHECK: dsbh $3, $14
423 0x7c 0x1c 0x38 0xa4 # CHECK: dsbh $7, $gp
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r3/ |
| D | valid-mips64r3.txt | 416 0x7c 0x0e 0x18 0xa4 # CHECK: dsbh $3, $14
418 0x7c 0x1c 0x38 0xa4 # CHECK: dsbh $7, $gp
|
| /external/llvm/test/MC/Mips/mips64r2/ |
| D | valid.s | 101 dsbh $v1,$14
|
12