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Searched refs:dsrl32 (Results 1 – 25 of 74) sorted by relevance

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/external/llvm/test/MC/Mips/
Drotations64.s106 # CHECK-64: dsrl32 $4, $4, 31 # encoding: [0x00,0x04,0x27,0xfe]
114 # CHECK-64: dsrl32 $4, $5, 31 # encoding: [0x00,0x05,0x27,0xfe]
119 # CHECK-64: dsrl32 $4, $5, 1 # encoding: [0x00,0x05,0x20,0x7e]
124 # CHECK-64: dsrl32 $4, $5, 0 # encoding: [0x00,0x05,0x20,0x3e]
142 # CHECK-64: dsrl32 $4, $5, 31 # encoding: [0x00,0x05,0x27,0xfe]
147 # CHECK-64: dsrl32 $4, $5, 1 # encoding: [0x00,0x05,0x20,0x7e]
152 # CHECK-64: dsrl32 $4, $5, 0 # encoding: [0x00,0x05,0x20,0x3e]
197 # CHECK-64: dsrl32 $1, $5, 0 # encoding: [0x00,0x05,0x08,0x3e]
202 # CHECK-64: dsrl32 $1, $5, 1 # encoding: [0x00,0x05,0x08,0x7e]
207 # CHECK-64: dsrl32 $1, $5, 31 # encoding: [0x00,0x05,0x0f,0xfe]
[all …]
Dmips64shift.ll44 ; CHECK: dsrl32 ${{[0-9]+}}, ${{[0-9]+}}, 8
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/
Drotations64.s106 # CHECK-64: dsrl32 $4, $4, 31 # encoding: [0x00,0x04,0x27,0xfe]
114 # CHECK-64: dsrl32 $4, $5, 31 # encoding: [0x00,0x05,0x27,0xfe]
119 # CHECK-64: dsrl32 $4, $5, 1 # encoding: [0x00,0x05,0x20,0x7e]
124 # CHECK-64: dsrl32 $4, $5, 0 # encoding: [0x00,0x05,0x20,0x3e]
142 # CHECK-64: dsrl32 $4, $5, 31 # encoding: [0x00,0x05,0x27,0xfe]
147 # CHECK-64: dsrl32 $4, $5, 1 # encoding: [0x00,0x05,0x20,0x7e]
152 # CHECK-64: dsrl32 $4, $5, 0 # encoding: [0x00,0x05,0x20,0x3e]
197 # CHECK-64: dsrl32 $1, $5, 0 # encoding: [0x00,0x05,0x08,0x3e]
202 # CHECK-64: dsrl32 $1, $5, 1 # encoding: [0x00,0x05,0x08,0x7e]
207 # CHECK-64: dsrl32 $1, $5, 31 # encoding: [0x00,0x05,0x0f,0xfe]
[all …]
Dmips64-instalias-imm-expanding.s123 # CHECK-NEXT: dsrl32 $1, $1, 0x0 # encoding: [0x3e,0x08,0x01,0x00]
175 # CHECK-NEXT: dsrl32 $4, $4, 0x0 # encoding: [0x3e,0x20,0x04,0x00]
227 # CHECK-NEXT: dsrl32 $1, $1, 0x0 # encoding: [0x3e,0x08,0x01,0x00]
279 # CHECK-NEXT: dsrl32 $4, $4, 0x0 # encoding: [0x3e,0x20,0x04,0x00]
331 # CHECK-NEXT: dsrl32 $1, $1, 0x0 # encoding: [0x3e,0x08,0x01,0x00]
383 # CHECK-NEXT: dsrl32 $4, $4, 0x0 # encoding: [0x3e,0x20,0x04,0x00]
438 # CHECK-NEXT: dsrl32 $1, $1, 0x0 # encoding: [0x3e,0x08,0x01,0x00]
497 # CHECK-NEXT: dsrl32 $4, $4, 0x0 # encoding: [0x3e,0x20,0x04,0x00]
556 # CHECK-NEXT: dsrl32 $1, $1, 0x0 # encoding: [0x3e,0x08,0x01,0x00]
607 # CHECK-NEXT: dsrl32 $4, $4, 0x0 # encoding: [0x3e,0x20,0x04,0x00]
[all …]
Dmacro-ddivu.s133 # CHECK-NOTRAP: dsrl32 $1, $1, 0 # encoding: [0x00,0x01,0x08,0x3e]
137 # CHECK-TRAP: dsrl32 $1, $1, 0 # encoding: [0x00,0x01,0x08,0x3e]
279 # CHECK-NOTRAP: dsrl32 $1, $1, 0 # encoding: [0x00,0x01,0x08,0x3e]
283 # CHECK-TRAP: dsrl32 $1, $1, 0 # encoding: [0x00,0x01,0x08,0x3e]
Dmacro-ddiv.s177 # CHECK-NOTRAP: dsrl32 $1, $1, 0 # encoding: [0x00,0x01,0x08,0x3e]
181 # CHECK-TRAP: dsrl32 $1, $1, 0 # encoding: [0x00,0x01,0x08,0x3e]
332 # CHECK-NOTRAP: dsrl32 $1, $1, 0 # encoding: [0x00,0x01,0x08,0x3e]
336 # CHECK-TRAP: dsrl32 $1, $1, 0 # encoding: [0x00,0x01,0x08,0x3e]
Dmips64shift.ll44 ; CHECK: dsrl32 ${{[0-9]+}}, ${{[0-9]+}}, 8
/external/llvm/test/MC/Mips/mips3/
Dvalid.s98 …dsrl32 $s3,23 # CHECK: dsrl32 $19, $19, 23 # encoding: [0x00,0x13,0x9d,0x…
99 …dsrl32 $s3,$6,23 # CHECK: dsrl32 $19, $6, 23 # encoding: [0x00,0x06,0x9d,0x…
/external/llvm/test/MC/Mips/mips64/
Dvalid.s109 …dsrl32 $s3,23 # CHECK: dsrl32 $19, $19, 23 # encoding: [0x00,0x13,0x9d,0x…
110 …dsrl32 $s3,$6,23 # CHECK: dsrl32 $19, $6, 23 # encoding: [0x00,0x06,0x9d,0x…
/external/llvm/test/MC/Mips/mips4/
Dvalid.s102 …dsrl32 $s3,23 # CHECK: dsrl32 $19, $19, 23 # encoding: [0x00,0x13,0x9d,0x…
103 …dsrl32 $s3,$6,23 # CHECK: dsrl32 $19, $6, 23 # encoding: [0x00,0x06,0x9d,0x…
/external/llvm/test/MC/Mips/mips5/
Dvalid.s102 …dsrl32 $s3,23 # CHECK: dsrl32 $19, $19, 23 # encoding: [0x00,0x13,0x9d,0x…
103 …dsrl32 $s3,$6,23 # CHECK: dsrl32 $19, $6, 23 # encoding: [0x00,0x06,0x9d,0x…
/external/llvm/test/MC/Mips/mips64r2/
Dvalid.s118 …dsrl32 $s3,23 # CHECK: dsrl32 $19, $19, 23 # encoding: [0x00,0x13,0x9d,0x…
119 …dsrl32 $s3,$6,23 # CHECK: dsrl32 $19, $6, 23 # encoding: [0x00,0x06,0x9d,0x…
/external/llvm/test/MC/Mips/mips64r3/
Dvalid.s118 …dsrl32 $s3,23 # CHECK: dsrl32 $19, $19, 23 # encoding: [0x00,0x13,0x9d,0x…
119 …dsrl32 $s3,$6,23 # CHECK: dsrl32 $19, $6, 23 # encoding: [0x00,0x06,0x9d,0x…
/external/llvm/test/MC/Mips/mips64r5/
Dvalid.s118 …dsrl32 $s3,23 # CHECK: dsrl32 $19, $19, 23 # encoding: [0x00,0x13,0x9d,0x…
119 …dsrl32 $s3,$6,23 # CHECK: dsrl32 $19, $6, 23 # encoding: [0x00,0x06,0x9d,0x…
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips3/
Dvalid.s114 …dsrl32 $s3,23 # CHECK: dsrl32 $19, $19, 23 # encoding: [0x00,0x13,0x9d,0x…
115 …dsrl32 $s3,$6,23 # CHECK: dsrl32 $19, $6, 23 # encoding: [0x00,0x06,0x9d,0x…
/external/llvm/test/MC/Mips/mips2/
Dinvalid-mips3.s43 …dsrl32 $s3,23 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fea…
44 …dsrl32 $s3,$6,23 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fea…
Dinvalid-mips5.s40 …dsrl32 $s3,23 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
41 …dsrl32 $s3,$6,23 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
Dinvalid-mips4.s41 …dsrl32 $s3,$6,23 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
42 …dsrl32 $s3,23 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips2/
Dinvalid-mips3.s43 …dsrl32 $s3,23 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fea…
44 …dsrl32 $s3,$6,23 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fea…
Dinvalid-mips4.s41 …dsrl32 $s3,$6,23 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
42 …dsrl32 $s3,23 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
/external/swiftshader/third_party/LLVM/test/CodeGen/Mips/
Dmips64shift.ll61 ; CHECK: dsrl32 ${{[0-9]+}}, ${{[0-9]+}}, 8
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips1/
Dinvalid-mips3.s47 …dsrl32 $s3,23 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
48 …dsrl32 $s3,$6,23 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
/external/llvm/test/MC/Mips/mips1/
Dinvalid-mips3.s47 …dsrl32 $s3,23 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
48 …dsrl32 $s3,$6,23 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r3/
Dvalid.s162 …dsrl32 $s3,23 # CHECK: dsrl32 $19, $19, 23 # encoding: [0x00,0x13,0x9d,0x…
163 …dsrl32 $s3,$6,23 # CHECK: dsrl32 $19, $6, 23 # encoding: [0x00,0x06,0x9d,0x…
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64/
Dvalid.s153 …dsrl32 $s3,23 # CHECK: dsrl32 $19, $19, 23 # encoding: [0x00,0x13,0x9d,0x…
154 …dsrl32 $s3,$6,23 # CHECK: dsrl32 $19, $6, 23 # encoding: [0x00,0x06,0x9d,0x…

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