Home
last modified time | relevance | path

Searched refs:dst (Results 1 – 25 of 5142) sorted by relevance

12345678910>>...206

/external/deqp/framework/opengl/
DgluES3PlusWrapperFuncs.inl6 dst->activeShaderProgram = src.activeShaderProgram;
7 dst->activeTexture = src.activeTexture;
8 dst->attachShader = src.attachShader;
9 dst->beginQuery = src.beginQuery;
10 dst->beginTransformFeedback = src.beginTransformFeedback;
11 dst->bindAttribLocation = src.bindAttribLocation;
12 dst->bindBuffer = src.bindBuffer;
13 dst->bindBufferBase = src.bindBufferBase;
14 dst->bindBufferRange = src.bindBufferRange;
15 dst->bindFramebuffer = src.bindFramebuffer;
[all …]
/external/mesa3d/prebuilt-intermediates/main/
Dformat_unpack.c56 unpack_float_a8b8g8r8_unorm(const void *void_src, GLfloat dst[4]) in unpack_float_a8b8g8r8_unorm()
66 dst[0] = _mesa_unorm_to_float(r, 8); in unpack_float_a8b8g8r8_unorm()
69 dst[1] = _mesa_unorm_to_float(g, 8); in unpack_float_a8b8g8r8_unorm()
72 dst[2] = _mesa_unorm_to_float(b, 8); in unpack_float_a8b8g8r8_unorm()
75 dst[3] = _mesa_unorm_to_float(a, 8); in unpack_float_a8b8g8r8_unorm()
79 unpack_float_x8b8g8r8_unorm(const void *void_src, GLfloat dst[4]) in unpack_float_x8b8g8r8_unorm()
88 dst[0] = _mesa_unorm_to_float(r, 8); in unpack_float_x8b8g8r8_unorm()
91 dst[1] = _mesa_unorm_to_float(g, 8); in unpack_float_x8b8g8r8_unorm()
94 dst[2] = _mesa_unorm_to_float(b, 8); in unpack_float_x8b8g8r8_unorm()
96 dst[3] = 1.0f; in unpack_float_x8b8g8r8_unorm()
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrShiftRotate.td18 let Constraints = "$src1 = $dst" in {
20 def SHL8rCL : I<0xD2, MRM4r, (outs GR8 :$dst), (ins GR8 :$src1),
21 "shl{b}\t{%cl, $dst|$dst, CL}",
22 [(set GR8:$dst, (shl GR8:$src1, CL))]>;
23 def SHL16rCL : I<0xD3, MRM4r, (outs GR16:$dst), (ins GR16:$src1),
24 "shl{w}\t{%cl, $dst|$dst, CL}",
25 [(set GR16:$dst, (shl GR16:$src1, CL))]>, OpSize;
26 def SHL32rCL : I<0xD3, MRM4r, (outs GR32:$dst), (ins GR32:$src1),
27 "shl{l}\t{%cl, $dst|$dst, CL}",
28 [(set GR32:$dst, (shl GR32:$src1, CL))]>;
[all …]
/external/wpa_supplicant_8/wpa_supplicant/
Dctrl_iface_named_pipe.c87 static void ctrl_close_pipe(struct wpa_ctrl_dst *dst);
93 static void global_close_pipe(struct wpa_global_dst *dst);
116 struct wpa_ctrl_dst *dst, *next; in ctrl_flush_broken_pipes() local
118 dst = priv->ctrl_dst; in ctrl_flush_broken_pipes()
120 while (dst) { in ctrl_flush_broken_pipes()
121 next = dst->next; in ctrl_flush_broken_pipes()
122 if (ctrl_broken_pipe(dst->pipe, dst->used)) { in ctrl_flush_broken_pipes()
124 dst); in ctrl_flush_broken_pipes()
125 ctrl_close_pipe(dst); in ctrl_flush_broken_pipes()
127 dst = next; in ctrl_flush_broken_pipes()
[all …]
/external/v8/src/ia32/
Dassembler-ia32.h576 void pop(Register dst);
577 void pop(Operand dst);
583 void mov_b(Register dst, Register src) { mov_b(dst, Operand(src)); } in mov_b() argument
584 void mov_b(Register dst, Operand src);
585 void mov_b(Register dst, int8_t imm8) { mov_b(Operand(dst), imm8); } in mov_b() argument
586 void mov_b(Operand dst, int8_t src) { mov_b(dst, Immediate(src)); } in mov_b() argument
587 void mov_b(Operand dst, const Immediate& src);
588 void mov_b(Operand dst, Register src);
590 void mov_w(Register dst, Operand src);
591 void mov_w(Operand dst, int16_t src) { mov_w(dst, Immediate(src)); } in mov_w() argument
[all …]
/external/llvm/lib/Target/X86/
DX86InstrShiftRotate.td18 let Constraints = "$src1 = $dst", SchedRW = [WriteShift] in {
20 def SHL8rCL : I<0xD2, MRM4r, (outs GR8 :$dst), (ins GR8 :$src1),
21 "shl{b}\t{%cl, $dst|$dst, cl}",
22 [(set GR8:$dst, (shl GR8:$src1, CL))], IIC_SR>;
23 def SHL16rCL : I<0xD3, MRM4r, (outs GR16:$dst), (ins GR16:$src1),
24 "shl{w}\t{%cl, $dst|$dst, cl}",
25 [(set GR16:$dst, (shl GR16:$src1, CL))], IIC_SR>, OpSize16;
26 def SHL32rCL : I<0xD3, MRM4r, (outs GR32:$dst), (ins GR32:$src1),
27 "shl{l}\t{%cl, $dst|$dst, cl}",
28 [(set GR32:$dst, (shl GR32:$src1, CL))], IIC_SR>, OpSize32;
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrShiftRotate.td18 let Constraints = "$src1 = $dst", SchedRW = [WriteShift] in {
20 def SHL8rCL : I<0xD2, MRM4r, (outs GR8 :$dst), (ins GR8 :$src1),
21 "shl{b}\t{%cl, $dst|$dst, cl}",
22 [(set GR8:$dst, (shl GR8:$src1, CL))]>;
23 def SHL16rCL : I<0xD3, MRM4r, (outs GR16:$dst), (ins GR16:$src1),
24 "shl{w}\t{%cl, $dst|$dst, cl}",
25 [(set GR16:$dst, (shl GR16:$src1, CL))]>, OpSize16;
26 def SHL32rCL : I<0xD3, MRM4r, (outs GR32:$dst), (ins GR32:$src1),
27 "shl{l}\t{%cl, $dst|$dst, cl}",
28 [(set GR32:$dst, (shl GR32:$src1, CL))]>, OpSize32;
[all …]
/external/libaom/libaom/aom_dsp/x86/
Dhighbd_intrapred_sse2.c19 void aom_highbd_h_predictor_4x4_sse2(uint16_t *dst, ptrdiff_t stride, in aom_highbd_h_predictor_4x4_sse2() argument
29 _mm_storel_epi64((__m128i *)dst, row0); in aom_highbd_h_predictor_4x4_sse2()
30 dst += stride; in aom_highbd_h_predictor_4x4_sse2()
31 _mm_storel_epi64((__m128i *)dst, row1); in aom_highbd_h_predictor_4x4_sse2()
32 dst += stride; in aom_highbd_h_predictor_4x4_sse2()
33 _mm_storel_epi64((__m128i *)dst, row2); in aom_highbd_h_predictor_4x4_sse2()
34 dst += stride; in aom_highbd_h_predictor_4x4_sse2()
35 _mm_storel_epi64((__m128i *)dst, row3); in aom_highbd_h_predictor_4x4_sse2()
38 void aom_highbd_h_predictor_4x8_sse2(uint16_t *dst, ptrdiff_t stride, in aom_highbd_h_predictor_4x8_sse2() argument
41 aom_highbd_h_predictor_4x4_sse2(dst, stride, above, left, bd); in aom_highbd_h_predictor_4x8_sse2()
[all …]
/external/v8/src/x64/
Dassembler-x64.h658 void popq(Register dst);
659 void popq(Operand dst);
665 void movb(Register dst, Operand src);
666 void movb(Register dst, Immediate imm);
667 void movb(Operand dst, Register src);
668 void movb(Operand dst, Immediate imm);
672 void movw(Register dst, Operand src);
673 void movw(Operand dst, Register src);
674 void movw(Operand dst, Immediate imm);
678 void movl(Operand dst, Label* src);
[all …]
Dassembler-x64.cc782 Register dst, in immediate_arithmetic_op() argument
786 emit_rex(dst, size); in immediate_arithmetic_op()
789 emit_modrm(subcode, dst); in immediate_arithmetic_op()
791 } else if (dst == rax) { in immediate_arithmetic_op()
796 emit_modrm(subcode, dst); in immediate_arithmetic_op()
801 void Assembler::immediate_arithmetic_op(byte subcode, Operand dst, in immediate_arithmetic_op() argument
804 emit_rex(dst, size); in immediate_arithmetic_op()
807 emit_operand(subcode, dst); in immediate_arithmetic_op()
811 emit_operand(subcode, dst); in immediate_arithmetic_op()
818 Register dst, in immediate_arithmetic_op_16() argument
[all …]
/external/openssh/openbsd-compat/
Dvis.c62 vis(char *dst, int c, int flag, int nextc) in vis() argument
67 *dst++ = '\\'; in vis()
68 *dst++ = c; in vis()
69 *dst = '\0'; in vis()
70 return (dst); in vis()
76 *dst++ = '\\'; in vis()
77 *dst++ = 'n'; in vis()
80 *dst++ = '\\'; in vis()
81 *dst++ = 'r'; in vis()
84 *dst++ = '\\'; in vis()
[all …]
/external/mesa3d/prebuilt-intermediates/nir/
Dnir_constant_expressions.c301 float16_t dst = src0 ? 1.0 : 0.0; in evaluate_b2f() local
303 _dst_val.u16[_i] = _mesa_float_to_half(dst); in evaluate_b2f()
316 float32_t dst = src0 ? 1.0 : 0.0; in evaluate_b2f() local
318 _dst_val.f32[_i] = dst; in evaluate_b2f()
331 float64_t dst = src0 ? 1.0 : 0.0; in evaluate_b2f() local
333 _dst_val.f64[_i] = dst; in evaluate_b2f()
360 int8_t dst = src0 ? 1 : 0; in evaluate_b2i() local
362 _dst_val.i8[_i] = dst; in evaluate_b2i()
375 int16_t dst = src0 ? 1 : 0; in evaluate_b2i() local
377 _dst_val.i16[_i] = dst; in evaluate_b2i()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/docs/
DAMDGPUAsmGFX7.rst21 …ds_add_rtn_u32 dst, src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
22 …ds_add_rtn_u64 dst, src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
29 …ds_and_rtn_b32 dst, src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
30 …ds_and_rtn_b64 dst, src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
33 …ds_append dst :ref:`ds_offset16<amdgpu_synid_ds_of…
38 …ds_cmpst_rtn_b32 dst, src0, src1, src2 :ref:`ds_offset16<amdgpu_synid_ds_of…
39 …ds_cmpst_rtn_b64 dst, src0, src1, src2 :ref:`ds_offset16<amdgpu_synid_ds_of…
40 …ds_cmpst_rtn_f32 dst, src0, src1, src2 :ref:`ds_offset16<amdgpu_synid_ds_of…
41 …ds_cmpst_rtn_f64 dst, src0, src1, src2 :ref:`ds_offset16<amdgpu_synid_ds_of…
42 …ds_condxchg32_rtn_b64 dst, src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
[all …]
DAMDGPUAsmGFX9.rst22 …ds_add_rtn_f32 dst, src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
23 …ds_add_rtn_u32 dst, src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
24 …ds_add_rtn_u64 dst, src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
32 …ds_and_rtn_b32 dst, src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
33 …ds_and_rtn_b64 dst, src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
36 …ds_append dst :ref:`ds_offset16<amdgpu_synid_ds_of…
37 …ds_bpermute_b32 dst, src0, src1 :ref:`ds_offset16<amdgpu_synid_ds_of…
42 …ds_cmpst_rtn_b32 dst, src0, src1, src2 :ref:`ds_offset16<amdgpu_synid_ds_of…
43 …ds_cmpst_rtn_b64 dst, src0, src1, src2 :ref:`ds_offset16<amdgpu_synid_ds_of…
44 …ds_cmpst_rtn_f32 dst, src0, src1, src2 :ref:`ds_offset16<amdgpu_synid_ds_of…
[all …]
/external/mesa3d/src/gallium/auxiliary/rtasm/
Drtasm_x86sse.c288 struct x86_reg dst, in emit_op_modrm() argument
291 switch (dst.mod) { in emit_op_modrm()
294 emit_modrm(p, dst, src); in emit_op_modrm()
301 emit_modrm(p, src, dst); in emit_op_modrm()
455 void x86_mov_reg_imm( struct x86_function *p, struct x86_reg dst, int imm ) in x86_mov_reg_imm() argument
457 DUMP_RI( dst, imm ); in x86_mov_reg_imm()
458 assert(dst.file == file_REG32); in x86_mov_reg_imm()
459 assert(dst.mod == mod_REG); in x86_mov_reg_imm()
460 emit_1ub(p, 0xb8 + dst.idx); in x86_mov_reg_imm()
464 void x86_mov_imm( struct x86_function *p, struct x86_reg dst, int imm ) in x86_mov_imm() argument
[all …]
/external/protobuf/objectivec/Tests/
DGPBMessageTests+Merge.m54 Message3 *dst = [[Message3 alloc] init];
58 dst.optionalInt32 = 1;
59 dst.optionalInt64 = 1;
60 dst.optionalUint32 = 1;
61 dst.optionalUint64 = 1;
62 dst.optionalSint32 = 1;
63 dst.optionalSint64 = 1;
64 dst.optionalFixed32 = 1;
65 dst.optionalFixed64 = 1;
66 dst.optionalSfixed32 = 1;
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/
DSystemZInstrFP.td29 def SelectF32 : Pseudo<(outs FP32:$dst), (ins FP32:$src1, FP32:$src2, i8imm:$cc),
31 [(set FP32:$dst,
33 def SelectF64 : Pseudo<(outs FP64:$dst), (ins FP64:$src1, FP64:$src2, i8imm:$cc),
35 [(set FP64:$dst,
44 def LD_Fp032 : Pseudo<(outs FP32:$dst), (ins),
45 "lzer\t{$dst}",
46 [(set FP32:$dst, fpimm0)]>;
47 def LD_Fp064 : Pseudo<(outs FP64:$dst), (ins),
48 "lzdr\t{$dst}",
49 [(set FP64:$dst, fpimm0)]>;
[all …]
DSystemZInstrInfo.td79 def Select32 : Pseudo<(outs GR32:$dst), (ins GR32:$src1, GR32:$src2, i8imm:$cc),
81 [(set GR32:$dst,
83 def Select64 : Pseudo<(outs GR64:$dst), (ins GR64:$src1, GR64:$src2, i8imm:$cc),
85 [(set GR64:$dst,
101 def JMP : Pseudo<(outs), (ins brtarget:$dst), "j\t{$dst}", [(br bb:$dst)]>;
104 def JMPr : Pseudo<(outs), (ins GR64:$dst), "br\t{$dst}", [(brind GR64:$dst)]>;
108 def JO : Pseudo<(outs), (ins brtarget:$dst),
109 "jo\t$dst",
110 [(SystemZbrcond bb:$dst, SYSTEMZ_COND_O, PSW)]>;
111 def JH : Pseudo<(outs), (ins brtarget:$dst),
[all …]
/external/deqp/framework/referencerenderer/
DrrVertexAttrib.cpp60 inline void readOrder (typename tcu::Vector<DstScalarType, 4>& dst, const int size, const void* ptr) in readOrder() argument
65 dst[Order::T0] = DstScalarType(aligned[0]); in readOrder()
66 if (size >= 2) dst[Order::T1] = DstScalarType(aligned[1]); in readOrder()
67 if (size >= 3) dst[Order::T2] = DstScalarType(aligned[2]); in readOrder()
68 if (size >= 4) dst[Order::T3] = DstScalarType(aligned[3]); in readOrder()
72 inline void readUnormOrder (tcu::Vec4& dst, const int size, const void* ptr) in readUnormOrder() argument
79 dst[Order::T0] = float(aligned[0]) / float(range); in readUnormOrder()
80 if (size >= 2) dst[Order::T1] = float(aligned[1]) / float(range); in readUnormOrder()
81 if (size >= 3) dst[Order::T2] = float(aligned[2]) / float(range); in readUnormOrder()
82 if (size >= 4) dst[Order::T3] = float(aligned[3]) / float(range); in readUnormOrder()
[all …]
/external/libvpx/libvpx/vpx_dsp/arm/
Dintrapred_neon.c26 static INLINE void dc_store_4x4(uint8_t *dst, ptrdiff_t stride, in dc_store_4x4() argument
30 for (i = 0; i < 4; ++i, dst += stride) { in dc_store_4x4()
31 vst1_lane_u32((uint32_t *)dst, vreinterpret_u32_u8(dc_dup), 0); in dc_store_4x4()
35 void vpx_dc_predictor_4x4_neon(uint8_t *dst, ptrdiff_t stride, in vpx_dc_predictor_4x4_neon() argument
45 dc_store_4x4(dst, stride, dc); in vpx_dc_predictor_4x4_neon()
48 void vpx_dc_left_predictor_4x4_neon(uint8_t *dst, ptrdiff_t stride, in vpx_dc_left_predictor_4x4_neon() argument
53 dc_store_4x4(dst, stride, dc); in vpx_dc_left_predictor_4x4_neon()
56 void vpx_dc_top_predictor_4x4_neon(uint8_t *dst, ptrdiff_t stride, in vpx_dc_top_predictor_4x4_neon() argument
61 dc_store_4x4(dst, stride, dc); in vpx_dc_top_predictor_4x4_neon()
64 void vpx_dc_128_predictor_4x4_neon(uint8_t *dst, ptrdiff_t stride, in vpx_dc_128_predictor_4x4_neon() argument
[all …]
/external/libvpx/libvpx/vpx_dsp/ppc/
Dintrapred_vsx.c14 void vpx_v_predictor_16x16_vsx(uint8_t *dst, ptrdiff_t stride, in vpx_v_predictor_16x16_vsx() argument
20 for (i = 0; i < 16; i++, dst += stride) { in vpx_v_predictor_16x16_vsx()
21 vec_vsx_st(d, 0, dst); in vpx_v_predictor_16x16_vsx()
25 void vpx_v_predictor_32x32_vsx(uint8_t *dst, ptrdiff_t stride, in vpx_v_predictor_32x32_vsx() argument
32 for (i = 0; i < 32; i++, dst += stride) { in vpx_v_predictor_32x32_vsx()
33 vec_vsx_st(d0, 0, dst); in vpx_v_predictor_32x32_vsx()
34 vec_vsx_st(d1, 16, dst); in vpx_v_predictor_32x32_vsx()
40 void vpx_h_predictor_4x4_vsx(uint8_t *dst, ptrdiff_t stride, in vpx_h_predictor_4x4_vsx() argument
50 vec_vsx_st(vec_sel(v0, vec_vsx_ld(0, dst), (uint8x16_t)mask4), 0, dst); in vpx_h_predictor_4x4_vsx()
51 dst += stride; in vpx_h_predictor_4x4_vsx()
[all …]
/external/v8/src/s390/
Dmacro-assembler-s390.cc302 void TurboAssembler::Move(Register dst, Handle<HeapObject> value) { in Move() argument
305 IndirectLoadConstant(dst, value); in Move()
309 mov(dst, Operand(value)); in Move()
312 void TurboAssembler::Move(Register dst, ExternalReference reference) { in Move() argument
315 IndirectLoadExternalReference(dst, reference); in Move()
319 mov(dst, Operand(reference)); in Move()
322 void TurboAssembler::Move(Register dst, Register src, Condition cond) { in Move() argument
323 if (dst != src) { in Move()
325 LoadRR(dst, src); in Move()
327 LoadOnConditionP(cond, dst, src); in Move()
[all …]
/external/v8/src/wasm/baseline/x64/
Dliftoff-assembler-x64.h66 inline void Load(LiftoffAssembler* assm, LiftoffRegister dst, Operand src, in Load() argument
70 assm->movl(dst.gp(), src); in Load()
73 assm->movq(dst.gp(), src); in Load()
76 assm->Movss(dst.fp(), src); in Load()
79 assm->Movsd(dst.fp(), src); in Load()
86 inline void Store(LiftoffAssembler* assm, Operand dst, LiftoffRegister src, in Store() argument
90 assm->movl(dst, src.gp()); in Store()
93 assm->movq(dst, src.gp()); in Store()
96 assm->Movss(dst, src.fp()); in Store()
99 assm->Movsd(dst, src.fp()); in Store()
[all …]
/external/swiftshader/src/Pipeline/
DShaderCore.cpp657 void ShaderCore::mov(Vector4f &dst, const Vector4f &src, bool integerDestination) in mov() argument
661 dst.x = As<Float4>(RoundInt(src.x)); in mov()
662 dst.y = As<Float4>(RoundInt(src.y)); in mov()
663 dst.z = As<Float4>(RoundInt(src.z)); in mov()
664 dst.w = As<Float4>(RoundInt(src.w)); in mov()
668 dst = src; in mov()
672 void ShaderCore::neg(Vector4f &dst, const Vector4f &src) in neg() argument
674 dst.x = -src.x; in neg()
675 dst.y = -src.y; in neg()
676 dst.z = -src.z; in neg()
[all …]
/external/swiftshader/src/Shader/
DShaderCore.cpp657 void ShaderCore::mov(Vector4f &dst, const Vector4f &src, bool integerDestination) in mov() argument
661 dst.x = As<Float4>(RoundInt(src.x)); in mov()
662 dst.y = As<Float4>(RoundInt(src.y)); in mov()
663 dst.z = As<Float4>(RoundInt(src.z)); in mov()
664 dst.w = As<Float4>(RoundInt(src.w)); in mov()
668 dst = src; in mov()
672 void ShaderCore::neg(Vector4f &dst, const Vector4f &src) in neg() argument
674 dst.x = -src.x; in neg()
675 dst.y = -src.y; in neg()
676 dst.z = -src.z; in neg()
[all …]

12345678910>>...206