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Searched refs:dst6 (Results 1 – 12 of 12) sorted by relevance

/external/libvpx/libvpx/vpx_dsp/mips/
Dvpx_convolve_avg_msa.c85 v16u8 dst0, dst1, dst2, dst3, dst4, dst5, dst6, dst7; in avg_width16_msa() local
90 LD_UB8(dst, dst_stride, dst0, dst1, dst2, dst3, dst4, dst5, dst6, dst7); in avg_width16_msa()
94 AVER_UB4_UB(src4, dst4, src5, dst5, src6, dst6, src7, dst7, dst4, dst5, in avg_width16_msa()
95 dst6, dst7); in avg_width16_msa()
96 ST_UB8(dst0, dst1, dst2, dst3, dst4, dst5, dst6, dst7, dst, dst_stride); in avg_width16_msa()
107 v16u8 dst0, dst1, dst2, dst3, dst4, dst5, dst6, dst7; in avg_width32_msa() local
114 LD_UB4(dst_dup, dst_stride, dst0, dst2, dst4, dst6); in avg_width32_msa()
126 AVER_UB4_UB(src4, dst4, src5, dst5, src6, dst6, src7, dst7, dst4, dst5, in avg_width32_msa()
127 dst6, dst7); in avg_width32_msa()
133 ST_UB4(dst0, dst2, dst4, dst6, dst, dst_stride); in avg_width32_msa()
[all …]
Dvpx_convolve8_avg_vert_msa.c470 v16u8 dst0, dst1, dst2, dst3, dst4, dst5, dst6, dst7; in common_vt_2t_and_aver_dst_32w_msa() local
488 LD_UB4(dst + 16, dst_stride, dst4, dst5, dst6, dst7); in common_vt_2t_and_aver_dst_32w_msa()
523 PCKEV_AVG_ST_UB(tmp1, tmp0, dst6, dst + 16 + 2 * dst_stride); in common_vt_2t_and_aver_dst_32w_msa()
542 v16u8 dst0, dst1, dst2, dst3, dst4, dst5, dst6, dst7; in common_vt_2t_and_aver_dst_64w_msa() local
562 LD_UB2(dst + 48, dst_stride, dst6, dst7); in common_vt_2t_and_aver_dst_64w_msa()
599 PCKEV_AVG_ST_UB(tmp5, tmp4, dst6, (dst + 48)); in common_vt_2t_and_aver_dst_64w_msa()
Didct16x16_msa.c332 v16u8 dst0, dst1, dst2, dst3, dst4, dst5, dst6, dst7; in vpx_iadst16_1d_columns_addblk_msa() local
442 dst6 = LD_UB(dst + 4 * dst_stride); in vpx_iadst16_1d_columns_addblk_msa()
444 ILVR_B2_SH(zero, dst6, zero, dst7, res6, res7); in vpx_iadst16_1d_columns_addblk_msa()
/external/ipsec-tools/src/racoon/
Dsockmisc.c577 struct sockaddr_in6 src6, dst6; local
580 memcpy(&dst6, dst, sizeof(dst6));
592 src6.sin6_flowinfo = dst6.sin6_flowinfo = 0;
595 m.msg_name = (caddr_t)&dst6;
596 m.msg_namelen = sizeof(dst6);
620 saddr2str((struct sockaddr *)&dst6),
621 dst6.sin6_scope_id);
649 struct sockaddr_in src6, dst6; local
652 memcpy(&dst6, dst, sizeof(dst6));
655 m.msg_name = (caddr_t)&dst6;
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/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dpic.ll104 @dst6 = internal global i32 0
109 store i32* @dst6, i32** @ptr6
111 store i32 %tmp.s, i32* @dst6
119 ; LINUX: leal dst6@GOTOFF(%eax), %ecx
122 ; LINUX: movl %ecx, dst6@GOTOFF(%eax)
/external/llvm/test/CodeGen/X86/
Dpic.ll104 @dst6 = internal global i32 0
109 store i32* @dst6, i32** @ptr6
111 store i32 %tmp.s, i32* @dst6
119 ; LINUX: leal dst6@GOTOFF(%eax), %ecx
122 ; LINUX: movl %ecx, dst6@GOTOFF(%eax)
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dpic.ll104 @dst6 = internal global i32 0
109 store i32* @dst6, i32** @ptr6
111 store i32 %tmp.s, i32* @dst6
119 ; LINUX: leal dst6@GOTOFF(%eax), %ecx
122 ; LINUX: movl %ecx, dst6@GOTOFF(%eax)
/external/iproute2/include/
Dutils.h236 int inet_get_addr(const char *src, __u32 *dst, struct in6_addr *dst6);
/external/iproute2/lib/
Dutils.c1180 int inet_get_addr(const char *src, __u32 *dst, struct in6_addr *dst6) in inet_get_addr() argument
1183 return inet_pton(AF_INET6, src, dst6); in inet_get_addr()
/external/libaom/libaom/av1/common/arm/
Djnt_convolve_neon.c209 int32x4_t dst4, dst5, dst6, dst7; in compute_avg_8x4() local
251 dst6 = vsubq_s32(vreinterpretq_s32_u32(sum6), sub_const_vec); in compute_avg_8x4()
260 dst6 = vqrshlq_s32(dst6, round_bits_vec); in compute_avg_8x4()
269 tmp6 = vqmovn_s32(dst6); in compute_avg_8x4()
/external/v8/src/arm64/
Dmacro-assembler-arm64.cc1092 const CPURegister& dst6, const CPURegister& dst7) { in Pop() argument
1095 DCHECK(!AreAliased(dst0, dst1, dst2, dst3, dst4, dst5, dst6, dst7)); in Pop()
1096 DCHECK(AreSameSizeAndType(dst0, dst1, dst2, dst3, dst4, dst5, dst6, dst7)); in Pop()
1099 int count = 5 + dst5.IsValid() + dst6.IsValid() + dst7.IsValid(); in Pop()
1104 PopHelper(count - 4, size, dst4, dst5, dst6, dst7); in Pop()
Dmacro-assembler-arm64.h754 const CPURegister& dst6 = NoReg, const CPURegister& dst7 = NoReg);