| /external/libvpx/libvpx/vpx_dsp/mips/ |
| D | vpx_convolve_avg_msa.c | 85 v16u8 dst0, dst1, dst2, dst3, dst4, dst5, dst6, dst7; in avg_width16_msa() local
90 LD_UB8(dst, dst_stride, dst0, dst1, dst2, dst3, dst4, dst5, dst6, dst7); in avg_width16_msa()
94 AVER_UB4_UB(src4, dst4, src5, dst5, src6, dst6, src7, dst7, dst4, dst5, in avg_width16_msa()
95 dst6, dst7); in avg_width16_msa()
96 ST_UB8(dst0, dst1, dst2, dst3, dst4, dst5, dst6, dst7, dst, dst_stride); in avg_width16_msa()
107 v16u8 dst0, dst1, dst2, dst3, dst4, dst5, dst6, dst7; in avg_width32_msa() local
115 LD_UB4(dst_dup + 16, dst_stride, dst1, dst3, dst5, dst7); in avg_width32_msa()
126 AVER_UB4_UB(src4, dst4, src5, dst5, src6, dst6, src7, dst7, dst4, dst5, in avg_width32_msa()
127 dst6, dst7); in avg_width32_msa()
134 ST_UB4(dst1, dst3, dst5, dst7, dst + 16, dst_stride); in avg_width32_msa()
[all …]
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| D | vpx_convolve8_avg_vert_msa.c | 470 v16u8 dst0, dst1, dst2, dst3, dst4, dst5, dst6, dst7; in common_vt_2t_and_aver_dst_32w_msa() local
488 LD_UB4(dst + 16, dst_stride, dst4, dst5, dst6, dst7); in common_vt_2t_and_aver_dst_32w_msa()
527 PCKEV_AVG_ST_UB(tmp3, tmp2, dst7, dst + 16 + 3 * dst_stride); in common_vt_2t_and_aver_dst_32w_msa()
542 v16u8 dst0, dst1, dst2, dst3, dst4, dst5, dst6, dst7; in common_vt_2t_and_aver_dst_64w_msa() local
562 LD_UB2(dst + 48, dst_stride, dst6, dst7); in common_vt_2t_and_aver_dst_64w_msa()
603 PCKEV_AVG_ST_UB(tmp7, tmp6, dst7, dst + 48 + dst_stride); in common_vt_2t_and_aver_dst_64w_msa()
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| D | deblock_msa.c | 639 v16u8 dst7, dst8, dst_r_b, dst_l_b; in vpx_mbpost_proc_down_msa() local
692 dst7 = LD_UB(dst_tmp + (7 * pitch)); in vpx_mbpost_proc_down_msa()
694 ILVRL_B2_UB(dst7, dst8, dst_r_b, dst_l_b); in vpx_mbpost_proc_down_msa()
712 dst7 = (v16u8)((rv2_0 + sum0_h + dst_r_h) >> 4); in vpx_mbpost_proc_down_msa()
714 tmp[row & 15] = (v16u8)__msa_pckev_b((v16i8)dst8, (v16i8)dst7); in vpx_mbpost_proc_down_msa()
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| D | idct16x16_msa.c | 332 v16u8 dst0, dst1, dst2, dst3, dst4, dst5, dst6, dst7; in vpx_iadst16_1d_columns_addblk_msa() local
443 dst7 = LD_UB(dst + 11 * dst_stride); in vpx_iadst16_1d_columns_addblk_msa()
444 ILVR_B2_SH(zero, dst6, zero, dst7, res6, res7); in vpx_iadst16_1d_columns_addblk_msa()
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| /external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
| D | 2010-04-30-LocalAlloc-LandingPad.ll | 23 %cleanup.dst7 = alloca i32 ; <i32*> [#uses=6]
29 store i32 1, i32* %cleanup.dst7
65 store i32 1, i32* %cleanup.dst7
69 store i32 2, i32* %cleanup.dst7
87 store i32 2, i32* %cleanup.dst7
92 store i32 2, i32* %cleanup.dst7
99 %tmp8 = load i32* %cleanup.dst7 ; <i32> [#uses=1]
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| /external/llvm/test/CodeGen/X86/ |
| D | 2010-04-30-LocalAlloc-LandingPad.ll | 23 %cleanup.dst7 = alloca i32 ; <i32*> [#uses=6]
29 store i32 1, i32* %cleanup.dst7
68 store i32 1, i32* %cleanup.dst7
72 store i32 2, i32* %cleanup.dst7
90 store i32 2, i32* %cleanup.dst7
95 store i32 2, i32* %cleanup.dst7
102 %tmp8 = load i32, i32* %cleanup.dst7 ; <i32> [#uses=1]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
| D | 2010-04-30-LocalAlloc-LandingPad.ll | 24 %cleanup.dst7 = alloca i32 ; <i32*> [#uses=6]
30 store i32 1, i32* %cleanup.dst7
69 store i32 1, i32* %cleanup.dst7
73 store i32 2, i32* %cleanup.dst7
91 store i32 2, i32* %cleanup.dst7
96 store i32 2, i32* %cleanup.dst7
103 %tmp8 = load i32, i32* %cleanup.dst7 ; <i32> [#uses=1]
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| /external/libaom/libaom/av1/common/arm/ |
| D | jnt_convolve_neon.c | 209 int32x4_t dst4, dst5, dst6, dst7; in compute_avg_8x4() local
252 dst7 = vsubq_s32(vreinterpretq_s32_u32(sum7), sub_const_vec); in compute_avg_8x4()
261 dst7 = vqrshlq_s32(dst7, round_bits_vec); in compute_avg_8x4()
270 tmp7 = vqmovn_s32(dst7); in compute_avg_8x4()
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| /external/v8/src/arm64/ |
| D | macro-assembler-arm64.cc | 1092 const CPURegister& dst6, const CPURegister& dst7) { in Pop() argument
1095 DCHECK(!AreAliased(dst0, dst1, dst2, dst3, dst4, dst5, dst6, dst7)); in Pop()
1096 DCHECK(AreSameSizeAndType(dst0, dst1, dst2, dst3, dst4, dst5, dst6, dst7)); in Pop()
1099 int count = 5 + dst5.IsValid() + dst6.IsValid() + dst7.IsValid(); in Pop()
1104 PopHelper(count - 4, size, dst4, dst5, dst6, dst7); in Pop()
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| D | macro-assembler-arm64.h | 754 const CPURegister& dst6 = NoReg, const CPURegister& dst7 = NoReg);
|