| /external/mesa3d/src/intel/compiler/ |
| D | brw_vec4.h | 76 dst_reg dst_null_f() in dst_null_f()
78 return dst_reg(brw_null_reg()); in dst_null_f()
81 dst_reg dst_null_df() in dst_null_df()
83 return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_DF)); in dst_null_df()
86 dst_reg dst_null_d() in dst_null_d()
88 return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); in dst_null_d()
91 dst_reg dst_null_ud() in dst_null_ud()
93 return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_UD)); in dst_null_ud()
113 dst_reg userplane[MAX_CLIP_PLANES];
120 dst_reg output_reg[VARYING_SLOT_TESS_MAX][4];
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| D | test_vec4_register_coalesce.cpp | 60 virtual dst_reg *make_reg_for_system_value(int location) in make_reg_for_system_value()
130 dst_reg temp = dst_reg(v, glsl_type::float_type); in TEST_F()
131 dst_reg init; in TEST_F()
133 dst_reg m0 = dst_reg(MRF, 0); in TEST_F()
149 dst_reg temp = dst_reg(v, glsl_type::vec4_type); in TEST_F()
150 dst_reg init; in TEST_F()
152 dst_reg m0 = dst_reg(MRF, 0); in TEST_F()
156 dst_reg m1 = dst_reg(MRF, 1); in TEST_F()
176 dst_reg init; in TEST_F()
178 dst_reg m0 = dst_reg(MRF, 0); in TEST_F()
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| D | gen6_gs_visitor.cpp | 69 emit(MOV(dst_reg(this->vertex_output_offset), brw_imm_ud(0u))); in emit_prolog()
74 vec4_instruction *inst = emit(MOV(dst_reg(MRF, 1), in emit_prolog()
91 emit(MOV(dst_reg(this->first_vertex), brw_imm_ud(URB_WRITE_PRIM_START))); in emit_prolog()
97 emit(MOV(dst_reg(this->prim_count), brw_imm_ud(0u))); in emit_prolog()
108 emit(MOV(dst_reg(this->max_svbi), in emit_prolog()
135 emit(GS_OPCODE_SET_PRIMITIVE_ID, dst_reg(this->primitive_id)); in emit_prolog()
148 dst_reg dst(this->vertex_output); in gs_emit_vertex()
164 dst_reg tmp = dst_reg(src_reg(this, glsl_type::uvec4_type)); in gs_emit_vertex()
166 dst_reg dst(this->vertex_output); in gs_emit_vertex()
173 emit(ADD(dst_reg(this->vertex_output_offset), in gs_emit_vertex()
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| D | brw_vec4_visitor.cpp | 30 vec4_instruction::vec4_instruction(enum opcode opcode, const dst_reg &dst, in vec4_instruction()
88 vec4_visitor::emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0, in emit()
96 vec4_visitor::emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0, in emit()
103 vec4_visitor::emit(enum opcode opcode, const dst_reg &dst, const src_reg &src0) in emit()
109 vec4_visitor::emit(enum opcode opcode, const dst_reg &dst) in emit()
117 return emit(new(mem_ctx) vec4_instruction(opcode, dst_reg())); in emit()
122 vec4_visitor::op(const dst_reg &dst, const src_reg &src0) \
129 vec4_visitor::op(const dst_reg &dst, const src_reg &src0, \
138 vec4_visitor::op(const dst_reg &dst, const src_reg &src0, \
149 vec4_visitor::op(const dst_reg &dst, const src_reg &src0, \
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| D | brw_fs_builder.h | 46 typedef fs_reg dst_reg; typedef
184 dst_reg
190 return dst_reg(VGRF, shader->alloc.allocate(
201 dst_reg
204 return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_F)); in null_reg_f()
207 dst_reg
210 return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_DF)); in null_reg_df()
216 dst_reg
219 return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); in null_reg_d()
225 dst_reg
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| D | brw_vec4_builder.h | 46 typedef brw::dst_reg dst_reg; typedef
171 dst_reg
177 return retype(dst_reg(VGRF, shader->alloc.allocate(
187 dst_reg
190 return dst_reg(retype(brw_null_vec(dispatch_width()), in null_reg_f()
197 dst_reg
200 return dst_reg(retype(brw_null_vec(dispatch_width()), in null_reg_d()
207 dst_reg
210 return dst_reg(retype(brw_null_vec(dispatch_width()), in null_reg_ud()
236 emit(enum opcode opcode, const dst_reg &dst) const in emit()
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| D | brw_ir_vec4.h | 32 class dst_reg; variable
50 explicit src_reg(const dst_reg ®);
149 class dst_reg : public backend_reg
152 DECLARE_RALLOC_CXX_OPERATORS(dst_reg)
156 dst_reg();
157 dst_reg(enum brw_reg_file file, int nr);
158 dst_reg(enum brw_reg_file file, int nr, const glsl_type *type,
160 dst_reg(enum brw_reg_file file, int nr, brw_reg_type type,
162 dst_reg(struct ::brw_reg reg);
163 dst_reg(class vec4_visitor *v, const struct glsl_type *type);
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| D | test_vec4_cmod_propagation.cpp | 60 virtual dst_reg *make_reg_for_system_value(int location) in make_reg_for_system_value()
146 dst_reg dest = dst_reg(v, glsl_type::float_type); in TEST_F()
150 dst_reg dest_null = bld.null_reg_f(); in TEST_F()
182 dst_reg dest = dst_reg(v, glsl_type::float_type); in TEST_F()
186 dst_reg dest_null = bld.null_reg_f(); in TEST_F()
219 dst_reg dest = dst_reg(v, glsl_type::int_type); in TEST_F()
255 dst_reg dest = dst_reg(v, glsl_type::uint_type); in TEST_F()
288 dst_reg dest = dst_reg(v, glsl_type::float_type); in TEST_F()
327 dst_reg dest0 = dst_reg(v, glsl_type::float_type); in TEST_F()
328 dst_reg dest1 = dst_reg(v, glsl_type::float_type); in TEST_F()
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| D | test_vec4_copy_propagation.cpp | 57 virtual dst_reg *make_reg_for_system_value(int location) in make_reg_for_system_value()
126 dst_reg a = dst_reg(v, glsl_type::vec4_type); in TEST_F()
127 dst_reg b = dst_reg(v, glsl_type::vec4_type); in TEST_F()
128 dst_reg c = dst_reg(v, glsl_type::vec4_type); in TEST_F()
155 dst_reg a = dst_reg(v, glsl_type::vec4_type); in TEST_F()
156 dst_reg b = dst_reg(v, glsl_type::vec4_type); in TEST_F()
157 dst_reg c = dst_reg(v, glsl_type::vec4_type); in TEST_F()
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| D | brw_vec4_tcs.cpp | 79 emit(TCS_OPCODE_GET_INSTANCE_ID, dst_reg(invocation_id)); in emit_prolog()
117 dst_reg header = dst_reg(this, glsl_type::uvec4_type); in emit_thread_end()
139 dst_reg header(this, glsl_type::uvec4_type); in emit_thread_end()
156 vec4_tcs_visitor::emit_input_urb_read(const dst_reg &dst, in emit_input_urb_read()
163 dst_reg temp(this, glsl_type::ivec4_type); in emit_input_urb_read()
167 dst_reg header = dst_reg(this, glsl_type::uvec4_type); in emit_input_urb_read()
192 vec4_tcs_visitor::emit_output_urb_read(const dst_reg &dst, in emit_output_urb_read()
200 dst_reg header = dst_reg(this, glsl_type::uvec4_type); in emit_output_urb_read()
212 read->dst = retype(dst_reg(this, glsl_type::ivec4_type), dst.type); in emit_output_urb_read()
230 inst = emit(TCS_OPCODE_SET_OUTPUT_URB_OFFSETS, dst_reg(message), in emit_urb_write()
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| D | brw_vec4_nir.cpp | 57 nir_locals = ralloc_array(mem_ctx, dst_reg, impl->reg_alloc); in nir_emit_impl()
59 nir_locals[i] = dst_reg(); in nir_emit_impl()
66 nir_locals[reg->index] = dst_reg(VGRF, alloc.allocate(num_regs)); in nir_emit_impl()
72 nir_ssa_values = ralloc_array(mem_ctx, dst_reg, impl->ssa_alloc); in nir_emit_impl()
177 static dst_reg
181 dst_reg reg; in dst_reg_for_nir_reg()
196 dst_reg
200 dst_reg dst = in get_nir_dest()
201 dst_reg(VGRF, alloc.allocate(DIV_ROUND_UP(dest.ssa.bit_size, 32))); in get_nir_dest()
212 dst_reg
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| D | brw_vec4_gs_visitor.cpp | 167 dst_reg r0(retype(brw_vec4_grf(0, 0), BRW_REGISTER_TYPE_UD)); in emit_prolog()
176 inst = emit(MOV(dst_reg(this->vertex_count), brw_imm_ud(0u))); in emit_prolog()
191 inst = emit(MOV(dst_reg(this->control_data_bits), brw_imm_ud(0u))); in emit_prolog()
235 dst_reg mrf_reg(MRF, base_mrf); in emit_thread_end()
260 dst_reg mrf_reg(MRF, mrf); in emit_urb_write_header()
346 emit(ADD(dst_reg(prev_count), this->vertex_count, in emit_control_data_bits()
350 emit(SHR(dst_reg(dword_index), prev_count, in emit_control_data_bits()
358 dst_reg mrf_reg(MRF, base_mrf); in emit_control_data_bits()
368 emit(SHR(dst_reg(per_slot_offset), dword_index, brw_imm_ud(2u))); in emit_control_data_bits()
382 inst = emit(AND(dst_reg(channel), dword_index, brw_imm_ud(3u))); in emit_control_data_bits()
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| D | brw_vec4_tes.cpp | 107 emit(TES_OPCODE_CREATE_INPUT_READ_HEADER, dst_reg(input_read_header)); in emit_prolog()
189 emit(TES_OPCODE_ADD_INDIRECT_URB_OFFSET, dst_reg(header), in nir_emit_intrinsic()
214 dst_reg temp(this, glsl_type::ivec4_type); in nir_emit_intrinsic()
226 dst_reg dst = get_nir_dest(instr->dest, BRW_REGISTER_TYPE_D); in nir_emit_intrinsic()
233 dst_reg temp(this, glsl_type::dvec4_type); in nir_emit_intrinsic()
234 dst_reg temp_d = retype(temp, BRW_REGISTER_TYPE_D); in nir_emit_intrinsic()
251 dst_reg shuffled(this, glsl_type::dvec4_type); in nir_emit_intrinsic()
254 dst_reg dst = get_nir_dest(instr->dest, BRW_REGISTER_TYPE_DF); in nir_emit_intrinsic()
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| D | brw_vec4_vs_visitor.cpp | 64 vec4_vs_visitor::emit_urb_slot(dst_reg reg, int varying) in emit_urb_slot()
90 vec4_vs_visitor::emit_clip_distances(dst_reg reg, int offset) in emit_clip_distances()
130 this->userplane[i] = dst_reg(UNIFORM, this->uniforms); in setup_uniform_clipplane_values()
151 dst_reg(this, glsl_type::vec4_type); in emit_thread_end()
153 dst_reg(this, glsl_type::vec4_type); in emit_thread_end()
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| D | brw_vec4_surface_builder.cpp | 41 const dst_reg dst = bld.vgrf(src.type, in emit_stride()
70 const dst_reg tmp = bld.vgrf(src.type); in emit_insert()
123 const dst_reg payload = bld.vgrf(BRW_REGISTER_TYPE_UD, sz); in emit_send()
144 const dst_reg dst = bld.vgrf(BRW_REGISTER_TYPE_UD, ret_sz); in emit_send()
213 const dst_reg srcs = bld.vgrf(BRW_REGISTER_TYPE_UD); in emit_untyped_atomic()
241 const dst_reg dst = bld.vgrf(BRW_REGISTER_TYPE_UD); in emit_typed_message_header()
321 const dst_reg srcs = bld.vgrf(BRW_REGISTER_TYPE_UD); in emit_typed_atomic()
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| D | brw_fs_register_coalesce.cpp | 161 int src_reg = -1, dst_reg = -1; in register_coalesce() local
186 dst_reg = inst->dst.nr; in register_coalesce()
189 if (dst_reg != inst->dst.nr) in register_coalesce()
228 dst_var[i] = live_intervals->var_from_vgrf[dst_reg] + dst_reg_offset[i]; in register_coalesce()
258 scan_inst->dst.nr = dst_reg; in register_coalesce()
266 scan_inst->src[j].nr = dst_reg; in register_coalesce()
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| /external/iproute2/include/ |
| D | bpf_util.h | 73 .dst_reg = DST, \
81 .dst_reg = DST, \
91 .dst_reg = DST, \
99 .dst_reg = DST, \
109 .dst_reg = DST, \
117 .dst_reg = DST, \
127 .dst_reg = DST, \
135 .dst_reg = DST, \
147 .dst_reg = DST, \
153 .dst_reg = 0, \
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| /external/bcc/src/cc/ |
| D | libbpf.h | 130 .dst_reg = DST, \
138 .dst_reg = DST, \
148 .dst_reg = DST, \
156 .dst_reg = DST, \
166 .dst_reg = DST, \
176 .dst_reg = DST, \
188 .dst_reg = DST, \
194 .dst_reg = 0, \
211 .dst_reg = 0, \
221 .dst_reg = DST, \
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| /external/bcc/src/cc/includes/ |
| D | libbpf.h | 130 .dst_reg = DST, \
138 .dst_reg = DST, \
148 .dst_reg = DST, \
156 .dst_reg = DST, \
166 .dst_reg = DST, \
176 .dst_reg = DST, \
188 .dst_reg = DST, \
194 .dst_reg = 0, \
211 .dst_reg = 0, \
221 .dst_reg = DST, \
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| /external/u-boot/board/gdsys/a38x/ |
| D | hre.c | 340 static int hre_op_loadkey(struct h_reg *src_reg, struct h_reg *dst_reg, in hre_op_loadkey() argument
346 if (!src_reg || !dst_reg || !src_reg->valid || !dst_reg->valid) in hre_op_loadkey()
348 if (find_key(src_reg->digest, dst_reg->digest, &parent_handle)) in hre_op_loadkey()
374 struct h_reg *src_reg, *dst_reg; in hre_execute_op() local
400 dst_reg = access_hreg(dst_spec, (opcode & 0x40) ? HREG_RDWR : HREG_WR); in hre_execute_op()
430 if (!dst_reg) in hre_execute_op()
451 bin_func(dst_reg->digest, src_buf, 20); in hre_execute_op()
452 dst_reg->valid = true; in hre_execute_op()
456 if (hre_op_loadkey(src_reg, dst_reg, data, data_size)) in hre_execute_op()
463 if (dst_reg && dst_modified && IS_PCR_HREG(dst_spec)) { in hre_execute_op()
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| /external/bcc/src/lua/bpf/ |
| D | bpf.lua | 109 ins.dst_reg = dst
246 local function vderef(dst_reg, src_reg, vinfo)
253 if dst_reg ~= src_reg then
254 emit(BPF.ALU64 + BPF.MOV + BPF.X, dst_reg, src_reg, 0, 0) -- dst = src
260 emit(BPF.MEM + BPF.LDX + const_width[w], dst_reg, src_reg, 0, 0) -- dst = *src;
440 local dst_reg = vreg(dst)
442 vderef(dst_reg, dst_reg, V[a])
447 emit(BPF.ALU64 + BPF[op] + BPF.K, dst_reg, 0, 0, b)
469 local dst_reg = vreg(dst)
471 vderef(dst_reg, dst_reg, V[a])
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| D | proto.lua | 227 local dst_reg, tmp_reg
229 dst_reg = e.vreg(var, 0, true)
230 tmp_reg = dst_reg -- Use target register to avoid copy
234 dst_reg = e.vreg(var) -- Must rematerialize (if it was spilled by tmp var)
235 e.emit(BPF.LD + BPF.IND + e.const_width[ffi.sizeof(type)], tmp_reg, dst_reg, 0, off or 0)
250 if dst_reg ~= tmp_reg then
251 e.emit(BPF.ALU + BPF.ADD + BPF.X, dst_reg, tmp_reg, 0, 0)
253 e.emit(BPF.ALU + BPF.ADD + BPF.K, dst_reg, 0, 0, d.off)
263 local dst_reg = e.vreg(var)
264 e.emit(BPF.ALU64 + BPF.ADD + BPF.K, dst_reg, 0, 0, off)
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| /external/mesa3d/src/mesa/program/ |
| D | ir_to_mesa.cpp | 62 class dst_reg;
91 explicit src_reg(dst_reg reg);
101 class dst_reg { class
103 dst_reg(gl_register_file file, int writemask) in dst_reg() function in __anon8fb3a92c0111::dst_reg
111 dst_reg() in dst_reg() function in __anon8fb3a92c0111::dst_reg
119 explicit dst_reg(src_reg reg);
130 src_reg::src_reg(dst_reg reg) in src_reg()
139 dst_reg::dst_reg(src_reg reg) in dst_reg() function in dst_reg
154 dst_reg dst;
276 dst_reg dst, src_reg src0);
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| /external/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
| D | ir-a2xx.c | 283 struct ir2_register *dst_reg = instr->regs[reg++]; in instr_emit_fetch() local
288 reg_update_stats(dst_reg, info, true); in instr_emit_fetch()
303 vtx->dst_reg = dst_reg->num; in instr_emit_fetch()
304 vtx->dst_swiz = reg_fetch_dst_swiz(dst_reg); in instr_emit_fetch()
331 tex->dst_reg = dst_reg->num; in instr_emit_fetch()
332 tex->dst_swiz = reg_fetch_dst_swiz(dst_reg); in instr_emit_fetch()
367 struct ir2_register *dst_reg = instr->regs[reg++]; in instr_emit_alu() local
395 reg_update_stats(dst_reg, info, true); in instr_emit_alu()
399 assert((dst_reg->flags & ~IR2_REG_EXPORT) == 0); in instr_emit_alu()
400 assert(!dst_reg->swizzle || (strlen(dst_reg->swizzle) == 4)); in instr_emit_alu()
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| /external/strace/tests-mx32/ |
| D | bpf-obj_get_info_by_fd.c | 74 uint8_t dst_reg:4; member
117 .dst_reg = BPF_REG_1,
122 .dst_reg = BPF_REG_10,
128 .dst_reg = BPF_REG_2,
133 .dst_reg = BPF_REG_2,
138 .dst_reg = BPF_REG_1,
151 .dst_reg = BPF_REG_0,
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