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Searched refs:efuse (Results 1 – 25 of 42) sorted by relevance

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/external/u-boot/board/ti/dra7xx/
Devm.c376 .mpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_MPU_NOM,
377 .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
385 .eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM,
386 .eve.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_DSPEVE_OD,
387 .eve.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_DSPEVE_HIGH,
388 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
396 .gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM,
397 .gpu.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_GPU_OD,
398 .gpu.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_GPU_HIGH,
399 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
[all …]
/external/u-boot/board/compulab/cl-som-am57x/
Dspl.c164 .mpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_MPU_NOM,
165 .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
172 .eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM,
173 .eve.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_DSPEVE_OD,
174 .eve.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_DSPEVE_HIGH,
175 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
182 .gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM,
183 .gpu.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_GPU_OD,
184 .gpu.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_GPU_HIGH,
185 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
[all …]
/external/u-boot/arch/arm/mach-mvebu/
Defuse.c68 static int do_prog_efuse(struct mvebu_hd_efuse *efuse, in do_prog_efuse() argument
73 val.dwords.d[0] = readl(&efuse->bits_31_0); in do_prog_efuse()
74 val.dwords.d[1] = readl(&efuse->bits_63_32); in do_prog_efuse()
75 val.lock = readl(&efuse->bit64); in do_prog_efuse()
84 writel(val.dwords.d[0], &efuse->bits_31_0); in do_prog_efuse()
86 writel(val.dwords.d[1], &efuse->bits_63_32); in do_prog_efuse()
88 writel(val.lock, &efuse->bit64); in do_prog_efuse()
96 struct mvebu_hd_efuse *efuse; in prog_efuse() local
103 efuse = get_efuse_line(nr); in prog_efuse()
104 if (!efuse) in prog_efuse()
[all …]
DMakefile27 obj-$(CONFIG_MVEBU_EFUSE) += efuse.o
/external/u-boot/board/ti/am57xx/
Dboard.c324 .mpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_MPU_NOM,
325 .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
333 .eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM,
334 .eve.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_DSPEVE_OD,
335 .eve.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_DSPEVE_HIGH,
336 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
344 .gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM,
345 .gpu.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_GPU_OD,
346 .gpu.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_GPU_HIGH,
347 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
[all …]
/external/u-boot/doc/device-tree-bindings/exynos/
Dtmu.txt14 - samsung,efuse-min-value : SOC efuse min value (Constant 40)
15 - efuse-value should be more than this value.
16 - samsung,efuse-value : SOC actual efuse value (Literal value)
19 - samsung,efuse-max-value : SoC max efuse value (Constant 100)
20 - efuse-value should be less than this value.
39 samsung,efuse-min-value = <40>;
40 samsung,efuse-value = <55>;
41 samsung,efuse-max-value = <100>;
/external/u-boot/drivers/misc/
Drockchip-efuse.c90 struct rockchip_efuse_regs *efuse = in rockchip_rk3399_efuse_read() local
108 &efuse->ctrl); in rockchip_rk3399_efuse_read()
111 setbits_le32(&efuse->ctrl, in rockchip_rk3399_efuse_read()
114 out_value = readl(&efuse->dout); in rockchip_rk3399_efuse_read()
115 clrbits_le32(&efuse->ctrl, RK3399_STROBE); in rockchip_rk3399_efuse_read()
123 writel(RK3399_PD | RK3399_CSB, &efuse->ctrl); in rockchip_rk3399_efuse_read()
/external/u-boot/arch/arm/mach-omap2/
Dclocks-common.c493 if (!v->efuse.reg[opp]) in optimize_vcore_voltage()
496 switch (v->efuse.reg_bits) { in optimize_vcore_voltage()
498 val = readw(v->efuse.reg[opp]); in optimize_vcore_voltage()
501 val = readl(v->efuse.reg[opp]); in optimize_vcore_voltage()
505 v->efuse.reg[opp], v->efuse.reg_bits); in optimize_vcore_voltage()
511 v->efuse.reg[opp], v->efuse.reg_bits, v->value[opp]); in optimize_vcore_voltage()
516 __func__, v->efuse.reg[opp], v->efuse.reg_bits, v->value[opp], in optimize_vcore_voltage()
600 abb_setup(vcores->mpu.efuse.reg[opp], in scale_vcores()
613 abb_setup(vcores->mm.efuse.reg[opp], in scale_vcores()
626 abb_setup(vcores->gpu.efuse.reg[opp], in scale_vcores()
[all …]
/external/u-boot/arch/arm/dts/
Duniphier-pro5.dtsi363 efuse@100 {
364 compatible = "socionext,uniphier-efuse";
368 efuse@130 {
369 compatible = "socionext,uniphier-efuse";
373 efuse@200 {
374 compatible = "socionext,uniphier-efuse";
378 efuse@300 {
379 compatible = "socionext,uniphier-efuse";
383 efuse@400 {
384 compatible = "socionext,uniphier-efuse";
Dexynos5420-smdk5420.dts31 samsung,efuse-min-value = <40>;
32 samsung,efuse-value = <55>;
33 samsung,efuse-max-value = <100>;
Duniphier-pro4.dtsi358 efuse@100 {
359 compatible = "socionext,uniphier-efuse";
363 efuse@130 {
364 compatible = "socionext,uniphier-efuse";
368 efuse@200 {
369 compatible = "socionext,uniphier-efuse";
Dkeystone-k2e-netcp.dtsi110 reg-names = "efuse";
189 efuse-mac = <1>;
201 efuse-mac = <0>;
Dkeystone-k2l-netcp.dtsi109 reg-names = "efuse";
172 efuse-mac = <1>;
184 efuse-mac = <0>;
Dkeystone-k2hk-netcp.dtsi126 reg-names = "efuse";
191 efuse-mac = <1>;
203 efuse-mac = <0>;
Duniphier-sld8.dtsi325 efuse@100 {
326 compatible = "socionext,uniphier-efuse";
330 efuse@200 {
331 compatible = "socionext,uniphier-efuse";
Duniphier-ld4.dtsi321 efuse@100 {
322 compatible = "socionext,uniphier-efuse";
326 efuse@130 {
327 compatible = "socionext,uniphier-efuse";
Dexynos5800-peach-pi.dts66 samsung,efuse-min-value = <40>;
67 samsung,efuse-value = <55>;
68 samsung,efuse-max-value = <100>;
Dexynos5250-smdk5250.dts82 samsung,efuse-min-value = <40>;
83 samsung,efuse-value = <55>;
84 samsung,efuse-max-value = <100>;
Dkeystone-k2g-netcp.dtsi100 reg-names = "efuse";
148 efuse-mac = <1>;
Duniphier-pxs3.dtsi375 efuse@100 {
376 compatible = "socionext,uniphier-efuse";
380 efuse@200 {
381 compatible = "socionext,uniphier-efuse";
Duniphier-pxs2.dtsi474 efuse@100 {
475 compatible = "socionext,uniphier-efuse";
479 efuse@200 {
480 compatible = "socionext,uniphier-efuse";
Duniphier-ld11.dtsi500 efuse@100 {
501 compatible = "socionext,uniphier-efuse";
505 efuse@200 {
506 compatible = "socionext,uniphier-efuse";
Duniphier-ld20.dtsi560 efuse@100 {
561 compatible = "socionext,uniphier-efuse";
565 efuse@200 {
566 compatible = "socionext,uniphier-efuse";
Dmeson-gx.dtsi131 efuse: efuse { label
132 compatible = "amlogic,meson-gx-efuse", "amlogic,meson-gxbb-efuse";
/external/u-boot/arch/arm/mach-omap2/omap5/
Dhw_data.c369 .mpu.efuse.reg[OPP_NOM] = OMAP5_ES2_PROD_MPU_OPNO_VMIN,
370 .mpu.efuse.reg_bits = OMAP5_ES2_PROD_REGBITS,
372 .core.efuse.reg[OPP_NOM] = OMAP5_ES2_PROD_CORE_OPNO_VMIN,
373 .core.efuse.reg_bits = OMAP5_ES2_PROD_REGBITS,
375 .mm.efuse.reg[OPP_NOM] = OMAP5_ES2_PROD_MM_OPNO_VMIN,
376 .mm.efuse.reg_bits = OMAP5_ES2_PROD_REGBITS,

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