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Searched refs:emac0clk (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-socfpga/include/mach/
Dclock_manager_gen5.h27 u32 emac0clk; member
69 u32 emac0clk; member
/external/u-boot/arch/arm/mach-socfpga/
Dclock_manager_gen5.c163 writel(cfg->emac0clk, &clock_manager_base->per_pll.emac0clk); in cm_basic_init()