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/external/llvm/test/MC/Disassembler/Mips/mips64r3/
Dvalid-xfail-mips64r3.txt7 0x46 0x21 0x94 0x3e # CHECK: c.le.d $fcc4, $f18, $f1
14 0x46 0x17 0x92 0x39 # CHECK: c.ngle.s $fcc2, $f18, $f23
25 0x46 0x32 0xcf 0x37 # CHECK: c.ule.d $fcc7, $f25, $f18
36 0x46 0xc4 0x90 0x3c # CHECK: c.lt.ps $f18, $f4
51 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20
57 0x46 0xdf 0x84 0x92 # CHECK: movz.ps $f18, $f16, ra
58 0x4c 0x52 0xf2 0xa9 # CHECK: msub.d $f10, $f2, $f30, $f18
60 0x46 0xc0 0x64 0x87 # CHECK: neg.ps $f18, $f12
61 0x4d 0x54 0x74 0xb1 # CHECK: nmadd.d $f18, $f10, $f14, $f20
70 0x46 0x20 0x34 0x95 # CHECK: recip.d $f18, $f6
/external/llvm/test/MC/Disassembler/Mips/mips64r2/
Dvalid-xfail-mips64r2.txt7 0x46 0x21 0x94 0x3e # CHECK: c.le.d $fcc4, $f18, $f1
14 0x46 0x17 0x92 0x39 # CHECK: c.ngle.s $fcc2, $f18, $f23
25 0x46 0x32 0xcf 0x37 # CHECK: c.ule.d $fcc7, $f25, $f18
36 0x46 0xc4 0x90 0x3c # CHECK: c.lt.ps $f18, $f4
51 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20
57 0x46 0xdf 0x84 0x92 # CHECK: movz.ps $f18, $f16, ra
58 0x4c 0x52 0xf2 0xa9 # CHECK: msub.d $f10, $f2, $f30, $f18
60 0x46 0xc0 0x64 0x87 # CHECK: neg.ps $f18, $f12
61 0x4d 0x54 0x74 0xb1 # CHECK: nmadd.d $f18, $f10, $f14, $f20
70 0x46 0x20 0x34 0x95 # CHECK: recip.d $f18, $f6
/external/llvm/test/MC/Disassembler/Mips/mips64r5/
Dvalid-xfail-mips64r5.txt7 0x46 0x21 0x94 0x3e # CHECK: c.le.d $fcc4, $f18, $f1
14 0x46 0x17 0x92 0x39 # CHECK: c.ngle.s $fcc2, $f18, $f23
25 0x46 0x32 0xcf 0x37 # CHECK: c.ule.d $fcc7, $f25, $f18
36 0x46 0xc4 0x90 0x3c # CHECK: c.lt.ps $f18, $f4
51 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20
57 0x46 0xdf 0x84 0x92 # CHECK: movz.ps $f18, $f16, ra
58 0x4c 0x52 0xf2 0xa9 # CHECK: msub.d $f10, $f2, $f30, $f18
60 0x46 0xc0 0x64 0x87 # CHECK: neg.ps $f18, $f12
61 0x4d 0x54 0x74 0xb1 # CHECK: nmadd.d $f18, $f10, $f14, $f20
70 0x46 0x20 0x34 0x95 # CHECK: recip.d $f18, $f6
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64r3/
Dvalid-xfail-mips64r3.txt7 0x46 0x21 0x94 0x3e # CHECK: c.le.d $fcc4, $f18, $f1
14 0x46 0x17 0x92 0x39 # CHECK: c.ngle.s $fcc2, $f18, $f23
25 0x46 0x32 0xcf 0x37 # CHECK: c.ule.d $fcc7, $f25, $f18
36 0x46 0xc4 0x90 0x3c # CHECK: c.lt.ps $f18, $f4
51 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20
57 0x46 0xdf 0x84 0x92 # CHECK: movz.ps $f18, $f16, ra
58 0x4c 0x52 0xf2 0xa9 # CHECK: msub.d $f10, $f2, $f30, $f18
60 0x46 0xc0 0x64 0x87 # CHECK: neg.ps $f18, $f12
61 0x4d 0x54 0x74 0xb1 # CHECK: nmadd.d $f18, $f10, $f14, $f20
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64r5/
Dvalid-xfail-mips64r5.txt7 0x46 0x21 0x94 0x3e # CHECK: c.le.d $fcc4, $f18, $f1
14 0x46 0x17 0x92 0x39 # CHECK: c.ngle.s $fcc2, $f18, $f23
25 0x46 0x32 0xcf 0x37 # CHECK: c.ule.d $fcc7, $f25, $f18
36 0x46 0xc4 0x90 0x3c # CHECK: c.lt.ps $f18, $f4
51 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20
57 0x46 0xdf 0x84 0x92 # CHECK: movz.ps $f18, $f16, ra
58 0x4c 0x52 0xf2 0xa9 # CHECK: msub.d $f10, $f2, $f30, $f18
60 0x46 0xc0 0x64 0x87 # CHECK: neg.ps $f18, $f12
61 0x4d 0x54 0x74 0xb1 # CHECK: nmadd.d $f18, $f10, $f14, $f20
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64r2/
Dvalid-xfail-mips64r2.txt7 0x46 0x21 0x94 0x3e # CHECK: c.le.d $fcc4, $f18, $f1
14 0x46 0x17 0x92 0x39 # CHECK: c.ngle.s $fcc2, $f18, $f23
25 0x46 0x32 0xcf 0x37 # CHECK: c.ule.d $fcc7, $f25, $f18
36 0x46 0xc4 0x90 0x3c # CHECK: c.lt.ps $f18, $f4
51 0x4e 0x94 0xd4 0xa1 # CHECK: madd.d $f18, $f20, $f26, $f20
57 0x46 0xdf 0x84 0x92 # CHECK: movz.ps $f18, $f16, ra
58 0x4c 0x52 0xf2 0xa9 # CHECK: msub.d $f10, $f2, $f30, $f18
60 0x46 0xc0 0x64 0x87 # CHECK: neg.ps $f18, $f12
61 0x4d 0x54 0x74 0xb1 # CHECK: nmadd.d $f18, $f10, $f14, $f20
/external/llvm/test/MC/Disassembler/Mips/mips64/
Dvalid-mips64-xfail.txt7 0x46 0x21 0x94 0x3e # CHECK: c.le.d $fcc4, $f18, $f1
14 0x46 0x17 0x92 0x39 # CHECK: c.ngle.s $fcc2, $f18, $f23
25 0x46 0x32 0xcf 0x37 # CHECK: c.ule.d $fcc7, $f25, $f18
33 0x4d 0x9e 0x93 0x1e # CHECK: alnv.ps $f12, $f18, $f30, $8
50 0x46 0x13 0x90 0xe6 # CHECK: cvt.ps.s $f3, $f18, $f19
53 0x4e 0x74 0xd4 0xa1 # CHECK: madd.d $f18, $f19, $f26, $f20
60 0x46 0xdf 0x8c 0x92 # CHECK: movz.ps $f18, $f17, ra
61 0x4c 0x32 0xfa 0xa9 # CHECK: msub.d $f10, $f1, $f31, $f18
66 0x4d 0x33 0x74 0xb1 # CHECK: nmadd.d $f18, $f9, $f14, $f19
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64/
Dvalid-mips64-xfail.txt7 0x46 0x21 0x94 0x3e # CHECK: c.le.d $fcc4, $f18, $f1
14 0x46 0x17 0x92 0x39 # CHECK: c.ngle.s $fcc2, $f18, $f23
25 0x46 0x32 0xcf 0x37 # CHECK: c.ule.d $fcc7, $f25, $f18
33 0x4d 0x9e 0x93 0x1e # CHECK: alnv.ps $f12, $f18, $f30, $8
50 0x46 0x13 0x90 0xe6 # CHECK: cvt.ps.s $f3, $f18, $f19
53 0x4e 0x74 0xd4 0xa1 # CHECK: madd.d $f18, $f19, $f26, $f20
60 0x46 0xdf 0x8c 0x92 # CHECK: movz.ps $f18, $f17, ra
61 0x4c 0x32 0xfa 0xa9 # CHECK: msub.d $f10, $f1, $f31, $f18
66 0x4d 0x33 0x74 0xb1 # CHECK: nmadd.d $f18, $f9, $f14, $f19
/external/llvm/test/MC/Disassembler/Mips/mips4/
Dvalid-xfail-mips4.txt7 0x46 0x21 0x94 0x3e # CHECK: c.le.d $fcc4, $f18, $f1
14 0x46 0x17 0x92 0x39 # CHECK: c.ngle.s $fcc2, $f18, $f23
25 0x46 0x32 0xcf 0x37 # CHECK: c.ule.d $fcc7, $f25, $f18
31 0x4e 0x74 0xd4 0xa1 # CHECK: madd.d $f18, $f19, $f26, $f20
33 0x4c 0x32 0xfa 0xa9 # CHECK: msub.d $f10, $f1, $f31, $f18
35 0x4d 0x33 0x74 0xb1 # CHECK: nmadd.d $f18, $f9, $f14, $f19
/external/llvm/test/MC/Disassembler/Mips/mips32r2/
Dvalid-xfail-mips32r2.txt7 0x46 0x21 0x94 0x3e # CHECK: c.le.d $fcc4, $f18, $f1
14 0x46 0x17 0x92 0x39 # CHECK: c.ngle.s $fcc2, $f18, $f23
25 0x46 0x32 0xcf 0x37 # CHECK: c.ule.d $fcc7, $f25, $f18
36 0x46 0xc4 0x90 0x3c # CHECK: c.lt.ps $f18, $f4
50 0x46 0x00 0x6c 0x8a # CHECK: ceil.l.s $f18, $f13
52 0x46 0x14 0x90 0xa6 # CHECK: cvt.ps.s $f2, $f18, $f20
63 0x46 0xdf 0x84 0x92 # CHECK: movz.ps $f18, $f16, ra
65 0x46 0xc0 0x64 0x87 # CHECK: neg.ps $f18, $f12
73 0x46 0x20 0x34 0x95 # CHECK: recip.d $f18, $f6
/external/llvm/test/MC/Disassembler/Mips/mips32r5/
Dvalid-xfail-mips32r5.txt7 0x46 0x21 0x94 0x3e # CHECK: c.le.d $fcc4, $f18, $f1
14 0x46 0x17 0x92 0x39 # CHECK: c.ngle.s $fcc2, $f18, $f23
25 0x46 0x32 0xcf 0x37 # CHECK: c.ule.d $fcc7, $f25, $f18
36 0x46 0xc4 0x90 0x3c # CHECK: c.lt.ps $f18, $f4
50 0x46 0x00 0x6c 0x8a # CHECK: ceil.l.s $f18, $f13
52 0x46 0x14 0x90 0xa6 # CHECK: cvt.ps.s $f2, $f18, $f20
63 0x46 0xdf 0x84 0x92 # CHECK: movz.ps $f18, $f16, ra
65 0x46 0xc0 0x64 0x87 # CHECK: neg.ps $f18, $f12
73 0x46 0x20 0x34 0x95 # CHECK: recip.d $f18, $f6
/external/llvm/test/MC/Disassembler/Mips/mips32r3/
Dvalid-xfail-mips32r3.txt7 0x46 0x21 0x94 0x3e # CHECK: c.le.d $fcc4, $f18, $f1
14 0x46 0x17 0x92 0x39 # CHECK: c.ngle.s $fcc2, $f18, $f23
25 0x46 0x32 0xcf 0x37 # CHECK: c.ule.d $fcc7, $f25, $f18
36 0x46 0xc4 0x90 0x3c # CHECK: c.lt.ps $f18, $f4
50 0x46 0x00 0x6c 0x8a # CHECK: ceil.l.s $f18, $f13
52 0x46 0x14 0x90 0xa6 # CHECK: cvt.ps.s $f2, $f18, $f20
63 0x46 0xdf 0x84 0x92 # CHECK: movz.ps $f18, $f16, ra
65 0x46 0xc0 0x64 0x87 # CHECK: neg.ps $f18, $f12
73 0x46 0x20 0x34 0x95 # CHECK: recip.d $f18, $f6
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips32r3/
Dvalid-xfail-mips32r3.txt7 0x46 0x21 0x94 0x3e # CHECK: c.le.d $fcc4, $f18, $f1
14 0x46 0x17 0x92 0x39 # CHECK: c.ngle.s $fcc2, $f18, $f23
25 0x46 0x32 0xcf 0x37 # CHECK: c.ule.d $fcc7, $f25, $f18
36 0x46 0xc4 0x90 0x3c # CHECK: c.lt.ps $f18, $f4
50 0x46 0x00 0x6c 0x8a # CHECK: ceil.l.s $f18, $f13
52 0x46 0x14 0x90 0xa6 # CHECK: cvt.ps.s $f2, $f18, $f20
63 0x46 0xdf 0x84 0x92 # CHECK: movz.ps $f18, $f16, ra
65 0x46 0xc0 0x64 0x87 # CHECK: neg.ps $f18, $f12
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips32r5/
Dvalid-xfail-mips32r5.txt7 0x46 0x21 0x94 0x3e # CHECK: c.le.d $fcc4, $f18, $f1
14 0x46 0x17 0x92 0x39 # CHECK: c.ngle.s $fcc2, $f18, $f23
25 0x46 0x32 0xcf 0x37 # CHECK: c.ule.d $fcc7, $f25, $f18
36 0x46 0xc4 0x90 0x3c # CHECK: c.lt.ps $f18, $f4
50 0x46 0x00 0x6c 0x8a # CHECK: ceil.l.s $f18, $f13
52 0x46 0x14 0x90 0xa6 # CHECK: cvt.ps.s $f2, $f18, $f20
63 0x46 0xdf 0x84 0x92 # CHECK: movz.ps $f18, $f16, ra
65 0x46 0xc0 0x64 0x87 # CHECK: neg.ps $f18, $f12
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips32r2/
Dvalid-xfail-mips32r2.txt7 0x46 0x21 0x94 0x3e # CHECK: c.le.d $fcc4, $f18, $f1
14 0x46 0x17 0x92 0x39 # CHECK: c.ngle.s $fcc2, $f18, $f23
25 0x46 0x32 0xcf 0x37 # CHECK: c.ule.d $fcc7, $f25, $f18
36 0x46 0xc4 0x90 0x3c # CHECK: c.lt.ps $f18, $f4
50 0x46 0x00 0x6c 0x8a # CHECK: ceil.l.s $f18, $f13
52 0x46 0x14 0x90 0xa6 # CHECK: cvt.ps.s $f2, $f18, $f20
63 0x46 0xdf 0x84 0x92 # CHECK: movz.ps $f18, $f16, ra
65 0x46 0xc0 0x64 0x87 # CHECK: neg.ps $f18, $f12
/external/llvm/test/MC/Mips/mips32r6/
Dinvalid-mips32r2.s8 …madd.d $f18,$f19,$f26,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
10 …msub.d $f10,$f1,$f31,$f18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
12 …nmadd.d $f18,$f9,$f14,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r6/
Dinvalid-mips32r2.s8 …madd.d $f18,$f19,$f26,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
10 …msub.d $f10,$f1,$f31,$f18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
12 …nmadd.d $f18,$f9,$f14,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64/
Dvalid.s48 …c.le.d $fcc4, $f18, $f0 # CHECK: c.le.d $fcc4, $f18, $f0 # encoding: [0x46,0x20,0…
55 …c.ngle.s $fcc2, $f18, $f23 # CHECK: c.ngle.s $fcc2, $f18, $f23 # encoding: [0x46,0x17,0…
62 …c.olt.d $fcc4, $f18, $f28 # CHECK: c.olt.d $fcc4, $f18, $f28 # encoding: [0x46,0x3c,0…
70 …c.ule.d $fcc7, $f24, $f18 # CHECK: c.ule.d $fcc7, $f24, $f18 # encoding: [0x46,0x32,0…
77 ceil.l.s $f18,$f13
206 madd.d $f18, $f22, $f26, $f20 # encoding: [0x4e,0xd4,0xd4,0xa1]
207 madd.s $f2, $f30, $f18, $f24 # encoding: [0x4f,0xd8,0x90,0xa0]
233 msub.d $f10, $f2, $f30, $f18 # encoding: [0x4c,0x52,0xf2,0xa9]
234 msub.s $f12, $f18, $f10, $f16 # encoding: [0x4e,0x50,0x53,0x28]
251 neg.d $f27,$f18
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips4/
Dvalid.s48 …c.le.d $fcc4, $f18, $f0 # CHECK: c.le.d $fcc4, $f18, $f0 # encoding: [0x46,0x20,0…
55 …c.ngle.s $fcc2, $f18, $f23 # CHECK: c.ngle.s $fcc2, $f18, $f23 # encoding: [0x46,0x17,0…
62 …c.olt.d $fcc4, $f18, $f28 # CHECK: c.olt.d $fcc4, $f18, $f28 # encoding: [0x46,0x3c,0…
70 …c.ule.d $fcc7, $f24, $f18 # CHECK: c.ule.d $fcc7, $f24, $f18 # encoding: [0x46,0x32,0…
77 ceil.l.s $f18,$f13
194 madd.d $f18, $f22, $f26, $f20 # encoding: [0x4e,0xd4,0xd4,0xa1]
195 madd.s $f2, $f30, $f18, $f24 # encoding: [0x4f,0xd8,0x90,0xa0]
218 msub.d $f10, $f2, $f30, $f18 # encoding: [0x4c,0x52,0xf2,0xa9]
219 msub.s $f12, $f18, $f10, $f16 # encoding: [0x4e,0x50,0x53,0x28]
234 neg.d $f27,$f18
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips5/
Dvalid.s48 …c.le.d $fcc4, $f18, $f0 # CHECK: c.le.d $fcc4, $f18, $f0 # encoding: [0x46,0x20,0…
55 …c.ngle.s $fcc2, $f18, $f23 # CHECK: c.ngle.s $fcc2, $f18, $f23 # encoding: [0x46,0x17,0…
62 …c.olt.d $fcc4, $f18, $f28 # CHECK: c.olt.d $fcc4, $f18, $f28 # encoding: [0x46,0x3c,0…
70 …c.ule.d $fcc7, $f24, $f18 # CHECK: c.ule.d $fcc7, $f24, $f18 # encoding: [0x46,0x32,0…
77 ceil.l.s $f18,$f13
195 madd.d $f18, $f22, $f26, $f20 # encoding: [0x4e,0xd4,0xd4,0xa1]
196 madd.s $f2, $f30, $f18, $f24 # encoding: [0x4f,0xd8,0x90,0xa0]
219 msub.d $f10, $f2, $f30, $f18 # encoding: [0x4c,0x52,0xf2,0xa9]
220 msub.s $f12, $f18, $f10, $f16 # encoding: [0x4e,0x50,0x53,0x28]
235 neg.d $f27,$f18
[all …]
/external/linux-kselftest/tools/testing/selftests/powerpc/include/
Dfpu_asm.h28 stfd f18,(stack_size + STACK_FRAME_MIN_SIZE - 104)(%r1); \
48 lfd f18,(stack_size + STACK_FRAME_MIN_SIZE - 104)(%r1); \
63 lfd f18,32(r3)
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r6/
Dinvalid-mips5-wrong-error.s10 … alnv.ps $f12,$f18,$f30,$12 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
31 … cvt.ps.s $f3,$f18,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
32 … cvt.ps.pw $f3,$f18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
38 … movz.ps $f18,$f17,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/external/llvm/test/MC/Mips/mips64r6/
Dinvalid-mips5-wrong-error.s10 … alnv.ps $f12,$f18,$f30,$12 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
31 … cvt.ps.s $f3,$f18,$f19 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
32 … cvt.ps.pw $f3,$f18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
38 … movz.ps $f18,$f17,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/external/llvm/test/MC/Disassembler/Mips/mips32/
Dvalid-xfail-mips32.txt7 0x46 0x21 0x94 0x3e # CHECK: c.le.d $fcc4, $f18, $f1
14 0x46 0x17 0x92 0x39 # CHECK: c.ngle.s $fcc2, $f18, $f23
25 0x46 0x32 0xcf 0x37 # CHECK: c.ule.d $fcc7, $f25, $f18
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips32/
Dvalid-xfail-mips32.txt7 0x46 0x21 0x94 0x3e # CHECK: c.le.d $fcc4, $f18, $f1
14 0x46 0x17 0x92 0x39 # CHECK: c.ngle.s $fcc2, $f18, $f23
25 0x46 0x32 0xcf 0x37 # CHECK: c.ule.d $fcc7, $f25, $f18

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